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PDF STP19NM65N Data sheet ( Hoja de datos )
| Número de pieza | STP19NM65N | |
| Descripción | Power MOSFET ( Transistor ) | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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STF19NM65N-STI19NM65N-STW19NM65N
STB19NM65N - STP19NM65N
N-channel 650 V - 0.25 Ω - 15.5 A - TO-220/FP-D2/I2PAK-TO-247
second generation MDmesh™ Power MOSFET
Features
Type
STB19NM65N
STF19NM65N
STI19NM65N
STP19NM65N
STW19NM65N
VDSS
(@Tjmax)
710 V
710 V
710 V
710 V
710 V
RDS(on) max
ID
< 0.27 Ω
< 0.27 Ω
< 0.27 Ω
< 0.27 Ω
< 0.27 Ω
15.5 A
15.5 A(1)
15.5 A
15.5 A
15.5 A
1. Limited only by maximum temperature allowed
■ 100% avalanche tested
■ Low input capacitance and gate charge
■ Low gate input resistance
Application
■ Switching applications
Description
This series of devices implements the second
generation of MDmesh™ Technology. This
revolutionary Power MOSFET associates a new
vertical structure to the Company’s strip layout to
yield one of the world’s lowest on-resistance and
gate charge. It is therefore suitable for the most
demanding high efficiency converters
3
2
1
TO-220
3
2
1
TO-220FP
3
1
D²PAK
123
I²PAK
3
2
1
TO-247
Figure 1. Internal schematic diagram
Table 1. Device summary
Order codes
STI19NM65N
STF19NM65N
STP19NM65N
STB19NM65NT4
STW19NM65N
Marking
19NM65N
19NM65N
19NM65N
19NM65N
19NM65N
Package
I²PAK
TO-220FP
TO-220
D²PAK
TO-247
Packaging
Tube
Tube
Tube
Tape and reel
Tube
February 2008
Rev 1
1/19
www.st.com
19
1 page  
STB19NM65N-STI19NM65N-STF19NM65N-STP/W19NM65N
2 Electrical characteristics
Electricwawl cwh.DaaratacStheereist4tUic.csom
(TCASE=25°C unless otherwise specified)
Table 5. On/off states
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
Drain-source
V(BR)DSS breakdown voltage
dv/dt (1) Drain source voltage slope
IDSS
IGSS
VGS(th)
RDS(on)
Zero gate voltage
drain current (VGS = 0)
Gate-body leakage
current (VDS = 0)
Gate threshold voltage
Static drain-source on
resistance
ID = 1 mA, VGS = 0
650
VDD= 520 V, ID=15.5 A,
VGS=10 V
VDS = Max rating
VDS = Max rating, @125 °C
VGS = ± 20 V
VDS = VGS, ID = 250 µA
2
VGS = 10 V, ID = 7.75 A
V
30 V/ns
1 µA
100 µA
±100 nA
34
0.25 0.27
V
Ω
1. Characteristics value at turn off on inductive load
Table 6. Dynamic
Symbol
Parameter
Test conditions
Min. Typ. Max. Unit
gfs (1)
Ciss
Coss
Crss
Forward transconductance
Input capacitance
Output capacitance
Reverse transfer
capacitance
VDS=15 V, ID =7.75 A
VDS = 50 V, f = 1 MHz,
VGS = 0
15
1900
110
10
S
pF
pF
pF
Coss
(2)
eq.
Equivalent output
capacitance
VGS = 0 ,
VDS = 0 to 520 V
230 pF
Qg Total gate charge
Qgs Gate-source charge
Qgd Gate-drain charge
VDD = 520 V, ID = 15.5 A,
VGS = 10 V,
(see Figure 19)
55 nC
9 nC
30 nC
1. Pulsed: pulse duration = 300µs, duty cycle 1.5%
2. Coss eq. is defined as a constant equivalent capacitance giving the same charging time as Coss when VDS
increases from 0 to 80% VDSS
5/19
5 Page 
STB19NM65N-STI19NM65N-STF19NM65N-STP/W19NM65N
4 Package mechanical data
Packagewmwwec.DhaatanSicheael td4Ua.tcaom
In order to meet environmental requirements, ST offers these devices in ECOPACK®
packages. These packages have a Lead-free second level interconnect. The category of
second level interconnect is marked on the package and on the inner box label, in
compliance with JEDEC Standard JESD97. The maximum ratings related to soldering
conditions are also marked on the inner box label. ECOPACK is an ST trademark.
ECOPACK specifications are available at: www.st.com
11/19
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet STP19NM65N.PDF ] | |
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