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PDF BUK9214-75B Data sheet ( Hoja de datos )
| Número de pieza | BUK9214-75B | |
| Descripción | TrenchMOS logic level FET | |
| Fabricantes | NXP Semiconductors | |
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BUK9214-75B
TrenchMOS™ logic level FET
Rev. 01 — 10 December 2002
M3D300
www.DataSheet4U.com
Objective data
1. Product profile
1.1 Description
N-channel enhancement mode field-effect power transistor in a plastic package using
Philips High-Performance Automotive (HPA) TrenchMOS™ technology, featuring very
low on-state resistance.
Product availability:
BUK9214-75B in SOT428 (D-PAK)
1.2 Features
s TrenchMOSTM technology
s 175 °C rated
s Q101 compliant
s Logic level compatible
1.3 Applications
s Automotive systems
s Motors, lamps and solenoids
s 12 V, 24 V, and 42 V loads
s General purpose power switching
1.4 Quick reference data
s EDS(AL)S ≤ 131 mJ
s ID ≤ 71 A
s RDSon = 11.9 mΩ (typ)
s Ptot ≤ 150 W
2. Pinning information
Table 1: Pinning - SOT428 (D-PAK), simplified outline and symbol
Pin Description
Simplified outline
1 gate (g)
2 drain (d)
[1]
mb
3 source (s)
mb mounting base;
connected to
drain (d)
2
1
Top view
3
MBK091
SOT428 (D-PAK)
[1] It is not possible to make connection to pin 2 of the SOT428 package.
Symbol
d
g
MBB076
s
1 page  
Philips Semiconductors
BUK9214-75B
TrenchMwOwSw™.DalotagSihceelet4vUe.lcoFmET
5. Characteristics
Table 4: Characteristics
Tj = 25 °C unless otherwise specified.
Symbol Parameter
Conditions
Static characteristics
V(BR)DSS
VGS(th)
drain-source breakdown
voltage
ID = 0.25 mA; VGS = 0 V
Tj = 25 °C
Tj = −55 °C
gate-source threshold voltage ID = 1 mA; VDS = VGS;
Figure 5
IDSS
IGSS
RDSon
drain-source leakage current
gate-source leakage current
drain-source on-state
resistance
Tj = 25 °C
Tj = 175 °C
Tj = −55 °C
VDS = 75 V; VGS = 0 V
Tj = 25 °C
Tj = 175 °C
VGS = ±15 V; VDS = 0 V
VGS = 5 V; ID = 25 A;
Figure 7
Dynamic characteristics
Tj = 25 °C
Tj = 175 °C
VGS = 4.5 V; ID = 25 A
VGS = 10 V; ID = 25 A
Qg(tot)
Qgs
Qgd
Ciss
Coss
Crss
td(on)
tr
td(off)
tf
Ld
total gate charge
gate-source charge
gate-drain (Miller) charge
input capacitance
output capacitance
reverse transfer capacitance
turn-on delay time
rise time
turn-off delay time
fall time
internal drain inductance
VGS = 5 V; VDS = 60 V;
ID = 25 A;
VGS = 0 V; VDS = 25 V;
f = 1 MHz;
VDS = 30 V; RL = 1.2 Ω;
VGS = 5 V; RG = 10 Ω
measured from drain to
centre of die
Ls internal source inductance measured from source lead
to source bond pad
Source-drain diode
VSD source-drain (diode forward) IS = 10 A; VGS = 0 V;
voltage
Figure 7
trr
reverse recovery time
IS = 20 A; dIS/dt = −100 A/µs
Qr recovered charge
VGS = −10 V; VDS = 30 V
Min
75
70
1.1
0.5
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
9397 750 10801
Objective data
Rev. 01 — 10 December 2002
Typ Max Unit
--V
--V
1.5 2
--
- 2.3
0.02 1
- 500
2 100
V
V
V
µA
µA
nA
11.9
-
-
10.7
32
6
13
3 022
290
115
tbf
tbf
tbf
tbf
2.5
7.5
14
29
15.5
12
-
-
-
4 029
348
158
-
-
-
-
-
-
mΩ
mΩ
mΩ
mΩ
nC
nC
nC
pF
pF
pF
nS
nS
nS
nS
nH
nH
0.85 1.2
V
tbf -
tbf -
ns
nC
© Koninklijke Philips Electronics N.V. 2002. All rights reserved.
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