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부품번호 | PM73121 기능 |
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기능 | AAL1 Segmentation And Reassembly Processor | ||
제조업체 | PMC-Sierra | ||
로고 | |||
전체 30 페이지수
Data Sheet
PMC-980620
Issue 3
PMC-Sierra, Inc.
PM731w2w1wA.DAaLta1Sgheaetot4rUI.Icom
AAL1 SAR Processor
PM73121
AAL1gator II
AAL1 Segmentation And Reassembly
Processor
DATA SHEET
Issue 3: January 1999
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Data Sheet
PMC-980620
,VVXH
PMC-Sierra, Inc.
PM7w3w1w21.DAaAtaLS1hgeaetto4rUI.Icom
AAL1 SAR Processor
From Version
Issue 1
To Version
Issue 2
Major Changes
• Removed Pin 237, P_OUT, from Pinout Table.
• In T_QUEUE_TBL, added clarifications to QUEUE_CREDITS
and AVG_SUB_VALU fields for single DS0 no pointer mode.
• Changed ItypE3 to ItypDS3 in DC Operating Conditions Table.
• Changed the following timing parameters:
• Interrupt Timing: PROC_INTR Tq(max) from 16 ns to 16.5
ns.
• Microprocessor RAM Read Cycle: /MEM_CS Tq(max)
from 15 ns to 17.7 ns.
• Microprocessor RAM Read Cycle: Tqmoe(max) from 22 ns
to 24.7 ns.
• Tzsu, Tded, and Tzen are now specified as typical, instead
of minimum and maximum.
• Microprocessor RAM Write Cycle: /PROC_ACK Tq(max)
from 15 ns to 17.5 ns.
• Microprocessor RAM Write Cycle: /MEM_CS Tq(max)
from 15 ns to 17.7 ns.
• Microprocessor Write Command Register: /PROC_ACK
Tq(max) from 15 to 17.5 ns.
• RAM Write Cycle: /MEM_WE Twp(min) from Tch - 1 to
Tch - 1.3, and Twp(max) from Tch to Tch +0.3.
• Receive Side Low Speed Interface: TL_SER, TL_SIG
Tq(max) from 12 ns to 14 ns.
• Transmit Side Interface: RL_SER Th(min) from 1.0 to 1.2
ns.
• Transmit Side High-Speed Interface: RL_SER Th(min) from
1.0 to 1.2 ns.
• Transmit UTOPIA ATM Timing: TATM_DATA Tq(max)
from 12 ns to 12.7 ns.
• TUTOPIA SPHY Timing: RPHY_DATA Tq(max) from 12
ns to 12.7 ns.
• TUTOPIA MPHY Timing: RPHY_DATA Tq(max) from 12
ns to 12.7 ns.
• Added DC Operating Conditions: ITYPE1(max)=420mA and
ITYPDS3(max)=482mA.
• In Absolute Maximum Ratings section, removed undershoot/
overshoot specification, and replaced with absolute maximum
voltage range for TTL inputs.
• Moved all timing requirements on external logic for RAM and
Microprocessor interface from section 6.5 to section 8.11.
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4페이지 Data Sheet
PMC-980620
,VVXH
PMC-Sierra, Inc.
PM7w3w1w21.DAaAtaLS1hgeaetto4rUI.Icom
AAL1 SAR Processor
From Version
10/17/97
(first version of the
WAC-121-A
User’s Manual)
To Version
01/21/98
Major Changes
• Under section 2.8.3 “Peak Cell Rates and Partial Cells”, on
page 22, changed the formula for TCGTOAM.
• Under section 3.1.2 “Transmit Signaling Freezing”, on page 32,
added the Dallas Semiconductor part numbers DS2152 and
DS2154.
• Changed the signal name text in the parentheses in Figure 23 on
page 35.
• Added step 8 on page 25, step 9 on page 25, and step 10 on
page 25.
• Deleted the NOTE after step 10 on page 36 and added ten more
paragraphs.
• Added section 3.2.1 “Transmit CDV” starting on page 37.
• Under section 3.3.2.1 “Header Construction”, on page 39, revised
the fourth sentence.
• Under section 3.4 “Transmit UTOPIA Interface Block
(TUTOPIA)” starting on page 41, added the last two sentences to
the first paragraph on page 43.
• Under section 3.6 “Receive Adaptation Layer Processor (RALP)”
starting on page 46, changed the last sentence of the third
paragraph on page 47, added text to the second, sixth, and eight
bullets on page 50.
• Under section 3.6.2 “Underrun” starting on page 60, added text to
the third paragraph on page 60.
• Under section 3.6.3 “Pointer Processing”, on page 61, added to
text to the third paragraph.
• Under section 3.6.4 “Overrun” starting on page 62, added text to
the first and third paragraphs.
• Added step 6 to the NOTES in Figure 47 on page 64.
• Under section 3.6.5 “Counters and Sticky Bits”, on page 65,
revised the first paragraph.
• Under section 3.7 “Receive Frame Transfer Controller (RFTC)”
starting on page 65.
• Under section 3.7.1 “SRTS for the Receive Side” starting on
page 66, revised the first and second paragraphs on page 69.
• In the headings of the first columns in Table 3 on page 72 and in
Table 4 on page 72, changed “SRTS_PORT(3:0)” to
“SRTS_LINE(3:0)”.
• Under section 3.8 “Memory Interface and Arbitration Controller
(MIAC)” starting on page 74, added the last sentence to the third
paragraph.
• Added section 3.9 “Configuration”, on page 75.
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부품번호 | 상세설명 및 기능 | 제조사 |
PM73121 | AAL1 Segmentation And Reassembly Processor | PMC-Sierra |
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