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부품번호 | K4S643233F-SP 기능 |
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기능 | 2Mx32 Mobile SDRAM 90FBGA CMOS SDRAM | ||
제조업체 | Samsung semiconductor | ||
로고 | |||
K4S643233F-S(D)E/N/I/P
www.DataSheet4U.com
CMOS SDRAM
2Mx32
Mobile SDRAM
90FBGA
(VDD/VDDQ 3.0V/3.0V or 3.3V/3.3V)
Revision 1.5
December 2002
Rev. 1.5 Dec. 2002
K4S643233F-S(D)E/N/I/P
www.DataSheet4U.com
CMOS SDRAM
ABSOLUTE MAXIMUM RATINGS
Parameter
Symbol
Value
Voltage on any pin relative to Vss
VI N, VOUT
-1.0 ~ 4.6
Voltage on VD D supply relative to Vss
VDD , VDDQ
-1.0 ~ 4.6
Storage temperature
TSTG
-55 ~ +150
Power dissipation
PD 1
Short circuit current
IOS 50
Notes :
Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are exceeded.
Functional operation should be restricted to recommended operating condition.
Exposure to higher than recommended voltage for extended periods of time could affect device reliability.
Unit
V
V
°C
W
mA
DC OPERATING CONDITIONS
Recommended operating conditions (Voltage referenced to VSS = 0V, TA = -25 °C to 85 °C for Extended, -40°C to 85°C for Industrial)
Parameter
Supply voltage
Input logic high voltage
Input logic low voltage
Output logic high voltage
Output logic low voltage
Input leakage current
Symbol
VD D
VDDQ
VI H
VIL
VO H
VOL
IL I
Min
2.7
2.7
2.2
-0.3
2.4
-
-10
Typ Max Unit
3.0 3.6
V
3.0 3.6
V
3.0 VDDQ+0.3
V
0 0.5 V
- -V
- 0.4 V
- 10 uA
Note
1
2
IOH = -2mA
IOL = 2mA
3
Notes :
1. VIH (max) = 5.3V AC. The overshoot voltage duration is ≤ 3ns.
2. VIL (min) = -2.0V AC. The undershoot voltage duration is ≤ 3ns.
3. Any input 0V ≤ VIN ≤ VDDQ.
Input leakage currents include HI-Z output leakage for all bi-directional buffers with Tri-State outputs.
4. Dout is disabled, 0V ≤ VOUT ≤ VDDQ.
CAPACITANCE (VDD = 3.0V & 3.3, TA = 23°C, f = 1MHz, VREF =0.9V ± 50 mV)
Pin
Clock
RAS, CAS, WE, CS, CKE, DQM0~ DQM3
Address(A0 ~ A10, BA0 ~ BA1)
D Q0 ~ D Q31
Symbol
CCLK
CIN
CADD
COUT
Min
-
-
-
-
Max
4.0
4.0
4.0
6.0
Unit
pF
pF
pF
pF
Note
Rev. 1.5 Dec. 2002
4페이지 K4S643233F-S(D)E/N/I/P
www.DataSheet4U.com
CMOS SDRAM
AC CHARACTERISTICS (AC operating conditions unless otherwise noted)
Parameter
Symbol
CAS latency=3
CLK cycle time
CAS latency=2
CAS latency=1
CAS latency=3
CLK to valid output delay CAS latency=2
CAS latency=1
Output data hold time
CAS latency=3
CAS latency=2
CAS latency=1
CLK high pulse width
CLK low pulse width
Input setup time
Input hold time
CLK to output in Low-Z
CAS latency=3
CLK to output in Hi-Z
CAS latency=2
CAS latency=1
tC C
tSAC
tO H
tC H
tC L
tS S
tSH
tSLZ
tSHZ
- 75
Min Max
7.5
9.5 1000
-
5.4
7
-
2.5
2.5
-
2.5
2.5
2.0
1.0
1
5.4
7
-
-1H
Min Max
9.5
9.5 1000
-
7
7
-
2.5
2.5
-
3
3
2.5
1.5
1
7
7
-
Notes :
1. Parameters depend on programmed CAS latency.
2. If clock rising time is longer than 1ns, (tr/2-0.5)ns should be added to the parameter.
3. Assumed input rise and fall time (tr & tf) = 1ns.
If tr & tf is longer than 1ns, transient time compensation should be considered,
i.e., [(tr + tf)/2-1]ns should be added to the parameter.
-1L
Min Max
9.5
12 1000
25
7
8
20
2.5
2.5
2.5
3
3
2.5
1.5
1
7
8
20
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
Note
1
1,2
2
3
3
3
3
2
Notes :
1. Samsung are not designed or manufactured for use in a device or system that is used under circumstance in which human life
is potentially at stake. Please contact to the memory marketing team in samsung electronics when considering the use of
a product contained herein for any specific purpose, such as medical, aerospace, nuclear, military, vehicular or undersea
repeater use.
Rev. 1.5 Dec. 2002
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부품번호 | 상세설명 및 기능 | 제조사 |
K4S643233F-SDE | 2Mx32 Mobile SDRAM 90FBGA CMOS SDRAM | Samsung semiconductor |
K4S643233F-SDI | 2Mx32 Mobile SDRAM 90FBGA CMOS SDRAM | Samsung semiconductor |
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