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6355ED 데이터시트 PDF




New Japan Radio에서 제조한 전자 부품 6355ED은 전자 산업 및 응용 분야에서
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부품번호 6355ED 기능
기능 NJU6355ED
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6355ED 데이터시트, 핀배열, 회로
SERIAL I/O REAL TIME CLOCK
NJU6355
www.DataSheet4U.com
sGENERAL DESCRIPTION
The NJU6355 series is a serial I/O real time clock suitable
for 4 bits microprocessor.
It contains quartz crystal oscillator, counter, shift register,
voltage regulator, voltage detector and interface controller.
The NJU6355 series required only 4-port of microprocessor
for data transfer, and the microprocessor can receive the data
at any time when the microprocessor requires.
The operating voltage is as wide as 2.0V to 5.5V,
consequently, the NJU6355 series can count accurate time
data even if the back up period.
Furthermore, the long time back up is available as the
operating current during the back up period is less than
3uA(TYP).
sPACKAGE OUTLINE
NJU6355ED
NJU6355EM
sFEATURES
qLow Operating Voltage
2.0 to 3.6V
qLow Operating Current
3.0uA (TYP) @2.0V
3.0uA (TYP) @3.0V
4.0uA (TYP) @5.0V
qBCD Counts of Seconds, Minutes, Hours, Days of Week
Day, Month and Year
qRequired only 4-port
DATA, CLK, CE and I/O
qLow Battery Detector
Low Voltage Alarm Signal Output
qAutomatic Leap Year Compensation
Up to AD 2099
qPackage Outline
DIP8 / DMP8
qC-MOS Technology
sPIN CONFIGURATION
I/O
XT
XT
VSS
VDD
DATA
CLK
CE
sLINE-UP TABLE
Type No.
Output Data
Oscillation Capacitor
NJU6355 E Seconds, Minutes, Hours, Days of Week, Day, Month, Year Cd=21pF / Cg=21pF on Chip
sBLOCK DIAGRAM
XT Oscillator
XT Divider
Sec. Min.
Timer Counter
Hr.
Days of
W eek
Day
Month
Year
Sec. Min.
Hr.
Days of
W eek
Day
Shift Register
Month
Year
DATA
VSS
VDD Controller
&
Voltage Detector
Clock Counter
I/O
CLK
CE
-1-




6355ED pdf, 반도체, 판매, 대치품
NJU6355
www.DataSheet4U.com
3. Timer Data Writing
When both of the I/O terminal and the CE terminal are "H", update is stopped, the oscillator divider is cleared,
and the timer data can be written to the NJU6355.
The timer data is written into the shift register from the DATA terminal by synchronized with rising edge of the
clock signal input from the CLK terminal, and the data is transferred from the shift register to the timer counter by
synchronized with falling edge of the CE signal. In this time the second-counter is cleared to "0", and the oscillator
divider start the operation.
The input data strings are LSB first of each digit as shown below.
Type E
Year
Month
Day
Days of
Week
Hour
Minute Second
The data is read out from LSB of Year, and last 44-bit is effective.
< Write Down Timing >
CLK
CE
I/O
Data
Input
Shift
Register
01 2 3 4 5 6 7
34567
Year
Minute
01 2 3 4 5 6 7
34567
The data is input into the shift
register at rising edge of the
CLK.
The data in the shift register is
transferred to the timer counter at this
falling edge of the CE, then the
oscillator divider start the operation.
Note) When the CE signal is which rising edge or falling edge,
the CLK signal should be fixed to "L". And so, before the
CE signal is raised, the I/O signal should be fixed to "H".
4. Low Voltage Detector
The NJU6355 series incorporate the low battery detector. If the supply voltage reduce to the detection level,
(EE)H is written into each digit of the shift register as warning code for the CPU.
5. Data Access
The NJU6355 series can operate from 2.0V to 5.5V. However, it is not allow the data access out of the range of
5V±10%. It may be broken the data unless 5V±10%.
Thus, when the data access, the CE terminal should be "H" after the power supply rise to 5V±10%, then start the
operation.
-4-

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부품번호상세설명 및 기능제조사
6355ED

NJU6355ED

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