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LC75884W 데이터시트 PDF




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부품번호 LC75884W 기능
기능 1/4 Duty LCD Display Drivers with Key Input Function
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LC75884W 데이터시트, 핀배열, 회로
Ordering number : EN6086
CMOS IC
LC75884E, LC75884W
1/4 Duty LCD Display Drivers with Key Input Function
Overview
The LC75884E and LC75884W are 1/4 duty LCD display
drivers that can directly drive up to 220 segments and can
control up to four general-purpose output ports. These
products also incorporate a key scan circuit that accepts
input from up to 30 keys to reduce printed circuit board
wiring.
Features
• Key input function for up to 30 keys (A key scan is
performed only when a key is pressed.)
• 1/4duty - 1/2bias and 1/4duty - 1/3bias drive schemes
can be controlled from serial data (up to 220 segments).
• Sleep mode and all segments off functions that are
controlled from serial data.
• Segment output port/general-purpose output port
function switching that is controlled from serial data.
• Serial data I/O supports CCB format communication
with the system controller.
• Direct display of display data without the use of a
decoder provides high generality.
• Independent VLCD for the LCD driver block (VLCD can
be set to in the range VDD-0.5 to 6.0 volts.)
• Provision of an on-chip voltage-detection type reset
circuit prevents incorrect displays.
• RES pin provided for forcibly initializing the IC internal
circuits.
• RC oscillator circuit.
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
Package Dimensions
unit: mm
QFP80E
0.8 0.8
64
65
[LC75884E]
23.2
20.0
0.35
1.6
41
40
0.15
80
1
25
24
2.7
unit: mm
SQFP80
21.6 0.8
SANYO: QFP80E(QIP80E)
[LC75884W]
1.25
60
14.0
12.0
0.5
1.25
41
0.135
61 40
80
1
21
0.2 20
0.5 0.5
SANYO: SQFP80
Any and all SANYO products described or contained herein do not have specifications that can handle
applications that require extremely high levels of reliability, such as life-support systems, aircraft’s
control systems, or other applications whose failure can be reasonably expected to result in serious
physical and/or material damage. Consult with your SANYO representative nearest you before using
any SANYO products described or contained herein in such applications.
SANYO assumes no responsibility for equipment failures that result from using products at values that
exceed, even momentarily, rated values (such as maximum ratings, operating condition ranges, or other
parameters) listed in products specifications of any and all SANYO products described or contained
herein.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-8534 JAPAN
22299RM (OT) No. 6086-1/27




LC75884W pdf, 반도체, 판매, 대치품
LC75884E, LC75884W
1. When CL is stopped at the low level
Figure 1
2. When CL is stopped at the high level
Figure 2
No. 6086-4/27

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LC75884W 전자부품, 판매, 대치품
LC75884E, LC75884W
Pin Functions
Pin
S1/P1
S2/P2
S3/P3
S4/P4
S5 to S53
COM1
COM2
COM3
COM4
Pin No.
LC75884E LC75884W
Function
1
2
3
4
5 to 53
79
80
1
2
3 to 51
Segment outputs for displaying the display data transferred by serial
data input.
The S1/P1 to S4/P4 pins can be used as general-purpose output ports
under serial data control.
54 52
55 53 Common driver outputs
56 54 The frame frequency fo is given by : fo = (fOSC/512)Hz.
57 55
Active
KS1/S54
KS2/S55
KS3 to KS6
58
59
60 to 63
56
57
58 to 61
Key scan outputs
Although normal key scan timing lines require diodes to be inserted in
the timing lines to prevent shorts, since these outputs are unbalanced
CMOS transistor outputs, these outputs will not be damaged by shorting
when these outputs are used to form a key matrix. The KS1/S54 and
KS2/S55 pins can be used as segment outputs when so specified by
the control data.
KI1 to KI5
OSC
64 to 68
75
Key scan inputs
62 to 66 These pins have built-in pull-down resistors.
Oscillator connection
73 An oscillator circuit is formed by connecting an external resistor and
capacitor at this pin.
H
CE 78
CL 79
DI 80
DO 77
RES
76
TEST
VLCD1
VLCD2
VDD
VLCD
VSS
74
71
72
69
70
73
76 Serial data interface connections to the controller. Note that DO, being
an open-drain output, requires a pull-up resistor.
77 CE :Chip enable
CL :Synchronization clock
78 DI :Transfer data
75 DO :Output data
Reset signal input
RES=low •••• Display off
Key scan disabled
74 All key data is reset to low
RES=high ••• Display on
Key scan enabled
However, serial data can be transferred when RES is low.
72 This pin must be connected to ground.
Used for applying the LCD drive 2/3 bias voltage externally. Must be
69 connected to VLCD2 when a 1/2 bias drive scheme is used.
Used for applying the LCD drive 1/3 bias voltage externally. Must be
70 connected to VLCD1 when a 1/2 bias drive scheme is used.
Logic block power supply connection. Provide a voltage of between 4.5
67 and 6.0V.
LCD driver block power supply connection. Provide a voltage of
68 between VDD–0.5 and 6.0V.
71 Power supply connection. Connect to ground.
H
v
L
I/O
Handling
when unused
q OPEN
q OPEN
O OPEN
I GND
I/O VDD
I
I GND
I
O OPEN
I VDD
I—
I OPEN
I OPEN
——
——
——
No. 6086-7/27

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