LC78622E - Compact Disc Player DSP

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LC78622E 기능

기능

Compact Disc Player DSP

제조업체

Sanyo Semicon Device

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Ordering number : EN5467

CMOS LSI

LC78622E

Compact Disc Player DSP

Overview

The LC78622E is a CMOS LSI that implements the signal

processing and servo control required by compact disc

players. At the same time as providing an EFM PLL

circuit, a 1-bit D/A converter, and an analog low-pass

filter the LC78622E realizes an optimal cost-performance

tradeoff for low-end players by strictly limiting

functionality to basic signal-processing and servo system

functionality. The LC78622E signal-processing system

provides demodulation of the EFM signal from the pickup,

de-interleaving, error detection and correction, and digital

filters that can prove useful in reducing the cost of end

products. The LC78622E servo control system processes

servo commands sent from the control microprocessor.

Functions

• Input signal processing: The LC78622E takes an HF

signal as input, digitizes (slices) that signal at a precise

level, converts that signal to an EFM signal, and

generates a PLL clock with an average frequency of

4.3218 MHz by comparing the phases of that signal and

an internal VCO.

• Precise reference clock and necessary internal timing

generation using an external 16.9344 MHz crystal

oscillator

• Disk motor speed control using a frame phase difference

signal generated from the playback clock and the

reference clock

• Frame synchronization signal detection, protection and

interpolation to assure stable data readout

• EFM signal demodulation and conversion to 8-bit

symbol data

• Subcode data separation from the EFM demodulated

signal and output of that data to an external

microprocessor

• Subcode Q signal output to a microprocessor over the

serial I/O interface after performing a CRC error check

(LSB first)

• Demodulated EFM signal buffering in internal RAM to

handle up to ±4 frames of disk rotational jitter

• Demodulated EFM signal reordering in the prescribed

order for data unscrambling and de-interleaving

• Error detection, correction, and flag processing (error

correction scheme: dual C1 plus dual C2 correction)

• The LC78622E sets the C2 flags based on the C1 flags

and a C2 check, and then performs signal interpolation

or muting depending on the C2 flags. The interpolation

circuit uses a dual-interpolation scheme. The previous

value is held if the C2 flags indicate errors two or more

times consecutively.

• Support for command input from a control

microprocessor: commands include track jump, focus

start, disk motor start/stop, muting on/off and track

count (8 bit serial input)

• Built-in digital output circuits.

• Arbitrary track counting to support high-speed data

access

• D/A converter outputs with data continuity improved by

4× oversampling digital filters.

• Built-in third-order ∑∆ D/A converters (An analog low-

pass filter is built in.)

• Built-in digital attenuator (8 bits – alpha, 239 steps)

• Built-in digital de-emphasis

• Zero cross muting

• Supports the implementation of a double-speed dubbing

function.

• Support for bilingual applications.

• General-purpose I/O ports: 5 pins

Features

• 5 V single-voltage power supply

• Supports low-voltage operation (3.0 V, minimum)

Package Dimensions

unit: mm

3159-QFP64E

[LC78622E]

SANYO: QFP64E

SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters

TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN

93096HA (OT) No. 5467-1/29

LC78622E

Electrical Characteristics at Ta = 25°C, VDD = 5 V, VSS = 0 V

Parameter

Current drain

Input high level current

Input low level current

Output high level voltage

Output low level voltage

Output off leakage current

Charge pump output current

Symbol

IDD

IIH (1)

IIH (2)

IIL

VOH (1)

VOH (2)

VOH (3)

VOL (1)

VOL (2)

VOL (3)

IOFF (1)

IOFF (2)

IPDOH

IPDOL

Conditions

VDD, XVDD, LVDD, RVDD, VVDD

DEFI, EFMIN, COIN, RES, HFL, TES, SBCK,

RWC, CQCK: TEST1: VIN = VDD

TAI, TEST2 to TEST5, CS: VIN = VDD = 5.5 V

DEFI, EFMIN, COIN, RES, HFL, TES, SBCK,

RWC, CQCK: TAI, TEST1 to TEST5, CS: VIN = 0 V

EFMO, CLV+, CLV–, V/P, PCK, FSEQ, TOFF,

TGL, JP+, JP–, EMPH, EFLG, FSX: IOH = –1 mA

MUTEL, MUTER, C2F, SBSY, PW, SFSY, WRQ,

SQOUT, TST11, 16M, 4.2M, CONT1 to CONT5:

IOH = –0.5 mA

DOUT: IOH = –12 mA

EFMO, CLV+, CLV–, V/P, PCK, FSEQ,

TOFF, TGL, JP+, JP–, EMPH, EFLG, FSX:

IOH = 1 mA

MUTEL, MUTER,

C2F, SBSY, PW, SFSY, WRQ, SQOUT,

TST11, 16M, 4.2M, CONT1 to CONT5:

IOH = 2 mA

DOUT: IOH = 12 mA

PDO, CLV+, CLV–, JP+, JP–, CONT1 to CONT5:

VOUT = VDD

PDO, CLV+, CLV–, JP+, JP–, CONT1 to CONT5:

VOUT = 0 V

PDO: RISET = 68 kΩ

min typ max Unit

25 35 mA

5 µA

25 75 µA

–5 µA

4.5 V

0.4 V

0.5 V

5 µA

–5 µA

64 80 96 µA

–96 –80 –64 µA

One-Bit D/A Converter Analog Characteristics

at Ta = 25°C, VDD = LVDD = RVDD = 5 V, VSS = LVSS = RVSS = 0 V

Parameter

Total harmonic distortion

Dynamic range

Signal-to-noise ratio

Crosstalk

Symbol

THD + N

S/N

Conditions

LCHO, RCHO; 1 kHz: 0 dB data input,

using the 20 kHz low-pass filter (AD725D built in)

LCHO, RCHO; 1 kHz: –60 dB data input,

using the 20 kHz low-pass filter and the A filter

(AD725D built in)

LCHO, RCHO; 1 kHz: 0 dB data input,

using the 20 kHz low-pass filter and the A filter

(AD725D built in)

LCHO, RCHO; 1 kHz: 0 dB data input,

using the 20 kHz low-pass filter (AD725D built in)

min typ max Unit

0.011

0.013

91 92

93 95

82 84

Note: Measured with the normal-speed playback mode in the Sanyo one-bit D/A converter block reference digital attenuator circuit set to EE (hexadecimal).

No. 5480-4/29

4페이지

LC78622E

Pin Functions

Pin No.

Symbol

DEFI

TAI

PDO

VVSS

ISET

VVDD

VSS

EFMO

EFMIN

TEST2

CLV+

CLV–

V/P

HFL

TES

TOFF

TGL

JP+

JP–

PCK

FSEQ

VDD

CONT1

CONT2

CONT3

CONT4

CONT5

EMPH

C2F

DOUT

TEST3

TEST4

N.C.

MUTEL

LVDD

LCHO

LVSS

RVSS

RCHO

RVDD

MUTER

XVDD

XOUT

XIN

XVSS

SBSY

EFLG

SFSY

I/O Function

I Defect detection signal (DEF) input. (Must be connected to 0 V when unused.)

I Test input. A pull-down resistor is built in. Must be connected to 0 V.

O External VCO control phase comparator output

–

PLL pins

Internal VCO ground. Must be connected to 0 V.

PDO output current adjustment resistor connection

– Internal VCO power supply

AI VCO frequency range adjustment

– Digital system ground. Must be connected to 0 V.

Slice level control

EFM signal output

EFM signal input

I Test input. A pull-down resistor is built in. Must be connected to 0 V.

O Disc motor control output.

O Three-value output is also possible when specified by microprocessor command.

Rough servo/phase control automatic switching monitor output. Outputs a high level during rough servo and a low level

O during phase control.

I Track detection signal input. This is a Schmitt input.

I Tracking error signal input. This is a Schmitt input.

O Tracking off output

O Tracking gain switching output. Increase the gain when low.

O Track jump output.

O Three-value output is also possible when specified by microprocessor command.

O EFM data playback clock monitor. Outputs 4.3218 MHz when the phase is locked.

Synchronization signal detection output. Outputs a high level when the synchronization signal detected from the EFM

O signal and the internally generated synchronization signal agree.

– Digital system power supply.

I/O General-purpose I/O pin 1

I/O General-purpose I/O pin 2

I/O General-purpose I/O pin 3

I/O General-purpose I/O pin 4

Controlled by serial data commands from the microprocessor. Any of these that are unused

must be either set up as input ports and connected to 0 V, or set up as output ports and

left open.

I/O General-purpose I/O pin 5

O De-emphasis monitor pin. A high level indicates playback of a de-emphasis disk.

O C2 flag output

O Digital output. (EIAJ format)

I Test input. A pull-down resistor is built in. Must be connected to 0 V.

– Unused. Must be left open.

O Left channel mute output

– Left channel

O one-bit D/A converter

Left channel power supply

Left channel output

– Left channel ground. Must be connected to 0 V.

– Right channel ground. Must be connected to 0 V.

O Right channel

– one-bit D/A converter

Right channel output

Right channel power supply

O Right channel mute output

– Crystal oscillator power supply.

Connections for a 16.9344 crystal oscillator element

– Crystal oscillator ground. Must be connected to 0 V.

O Subcode block synchronization signal output

O C1, C2, single and double error correction monitor pin

O Subcode P, Q, R, S, T, U, V and W output

O Subcode frame synchronization signal output. This signal falls when the subcodes are in the standby state.

No. 5480-7/29

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부품번호	상세설명 및 기능	제조사
LC78622E	Compact Disc Player DSP	Sanyo Semicon Device
LC78622NE	Compact Disc Player DSP	Sanyo Semicon Device