(PDF) KK74ACT273 Datasheet - Common Clock and Reset High-Speed Silicon-Gate CMOS

Número de pieza	KK74ACT273
Descripción	Common Clock and Reset High-Speed Silicon-Gate CMOS
Fabricantes	KODENSHI KOREA
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No Preview Available ! TECHNICAL DATA www.DataSheet4U.com Octal D Flip-Flop with Common Clock and Reset High-Speed Silicon-Gate CMOS KK74ACT273 The KK74ACT273 is identical in pinout to the LS/ALS273, HC/HCT273. The KK74ACT273 may be used as a level converter for interfacing TTL or NMOS outputs to High Speed CMOS inputs. This device consists of eight D flip-flops with common Clock and Reset inputs. Each flip-flop is loaded with a low-to-high transition of the Clock input. Reset is asynchronous and active low. • TTL/NMOS Compatible Input Levels • Outputs Directly Interface to CMOS, NMOS, and TTL • Operating Voltage Range: 4.5 to 5.5 V • Low Input Current: 1.0 µA; 0.1 µA @ 25°C • Outputs Source/Sink 24 mA ORDERING INFORMATION KK74ACT273N Plastic KK74ACT273DW SOIC TA = -40° to 85° C for all packages LOGIC DIAGRAM PIN ASSIGNMENT PIN 20=VCC PIN 10 = GND FUNCTION TABLE Inputs Reset Clock LX H H HL H X = don’t care D X H L X X Output Q L H L no change no change 1 1 page KK74ACT273 www.DataSheet4U.com Figure 1. Switching Waveforms Figure 2. Switching Waveforms Figure 3. Switching Waveforms EXPANDED LOGIC DIAGRAM 5 5 Page

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PDF KK74ACT273 Data sheet ( Hoja de datos )