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PDF CS8421 Data sheet ( Hoja de datos )
| Número de pieza | CS8421 | |
| Descripción | 32-bit 192 kHz Asynchronous Sample Rate Converter | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CS8421 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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CS8421
32-Bit, 192-kHz Asynchronous Sample Rate Converter
Features
175-dB Dynamic Range
–140-dB THD+N
No Programming Required
No External Master Clock Required
Supports Sample Rates up to 211 kHz
Input/Output Sample Rate Ratios of 7.5:1 to 1:8
Master Clock Support for 128 x Fs, 256 x Fs,
384 x Fs, and 512 x Fs (Master Mode)
16-, 20-, 24-, or 32-bit Data I/O
32-bit Internal Signal Processing
Dither Automatically Applied and Scaled to
Output Resolution
Flexible 3-wire Serial Digital Audio Input and
Output Ports
Master and Slave Modes for Both Input and
Output
Bypass Mode
Time Division Multiplexing (TDM) Mode
Attenuates Clock Jitter
Multiple Device Outputs are Phase Matched
Linear Phase FIR Filter
Automatic Soft Mute/Unmute
+2.5-V Digital Supply (VD)
+3.3-V or 5.0-V Digital Interface (VL)
Space-saving 20-pin TSSOP and QFN
Packages
The CS8421 supports sample rates up to 211 kHz and
is available in 20-pin TSSOP and QFN packages in both
Commercial (-10° to +70°C) and Automotive (-40° to
+85°C and -40° to +105°C) grades. The CDB8421 Cus-
tomer Demonstration board is also available for device
evaluation and implementation suggestions. See “Or-
dering Information” on page 35 for complete details.
RST
Level Translators
BYPASS
SDIN
ISCLK
ILRCK
Serial
Audio
Data
Input
Sync Info
Time
Varying
Digital
Filters
Data
Sync Info
MS_SEL
SAIF
SAOF
Serial
Port
Mode
Decoder
Digital
PLL
3.3 V or 5.0 V (VL)
2.5 V (VD) GND
Serial
Data Audio
Output
Clock
Generator
XTI XTO
http://www.cirrus.com
Copyright Cirrus Logic, Inc. 2004–2015
(All Rights Reserved)
TDM_IN
SDOUT
OSCLK
OLRCK
SRC_UNLOCK
MCLK_OUT
DS641F7
AUG ‘15
1 page  
1. PIN DESCRIPTIONS
1.1 TSSOP PIN DESCRIPTIONS
XTO
XTI
VD
GND
RST
BYPASS
ILRCK
ISCLK
SDIN
MCLK_OUT
1
2
3
4
5
6
7
8
9
10
CS8421
20 SRC_UNLOCK
19 SAIF
18 SAOF
17 VL
16 GND
15 MS_SEL
14 OLRCK
13 OSCLK
12 SDOUT
11 TDM_IN
DS641F7
5
5 Page 
DIGITAL FILTER CHARACTERISTICS
CS8421
Parameter
Passband (Upsampling or Downsampling)
Passband Ripple
Stopband
Stopband Attenuation
Group Delay
Min
-
-
0.5465*Fso
125
SRC Mode
Bypass Mode
-
-
Typ
-
-
-
-
(Note 3)
-
Max Units
0.4535*Fso Hz
±0.007
dB
- Hz
- dB
-
3/Fsi
s
s
3. The equation for the group delay through the sample-rate converter is (56.581 / Fsi) + (55.658 / Fso). For example,
if the input sample rate is 192 kHz and the output sample rate is 96 kHz, the group delay through the sample-rate
converter is (56.581/192,000) + (55.658/96,000) =.875 milliseconds.
DC ELECTRICAL CHARACTERISTICS
(GND = 0 V; all voltages with respect to 0 V.)
Parameter
Symbol Min Typ Max Units
Power-Down Mode (Note 4)
Supply Current in power-down
(Oscillator attached to XTI-XTO)
VD
VL = 3.3 V
VL = 5.0 V
50 A
100 A
200 A
Supply Current in power-down
(Crystal attached to XTI-XTO)
VD
VL = 3.3 V
VL = 5.0 V
100 A
1.5 mA
4 mA
Normal Operation (Note 5)
Supply Current at 48 kHz Fsi and Fso
(Oscillator attached to XTI-XTO)
VD
VL = 3.3 V
VL = 5.0 V
24 mA
2.5 mA
4 mA
Supply Current at 192 kHz Fsi and Fso
(Oscillator attached to XTI-XTO)
VD
VL = 3.3 V
VL = 5.0 V
80 mA
8 mA
13 mA
Supply Current at 48 kHz Fsi and Fso
(Crystal attached to XTI-XTO)
VD
VL = 3.3 V
VL = 5.0 V
24 mA
3 mA
7 mA
Supply Current at 192 kHz Fsi and Fso
(Crystal attached to XTI-XTO)
VD
VL = 3.3 V
VL = 5.0 V
80 mA
4 mA
6.5 mA
4. Power Down Mode is defined as RST = LOW with all clocks and data lines held static, except when a crystal is
attached across XTI-XTO, in which case the crystal will begin oscillating.
5. Normal operation is defined as RST = HI.
DS641F7
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CS8421.PDF ] | |
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