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ICX259AL 데이터시트 PDF




Sony Corporation에서 제조한 전자 부품 ICX259AL은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 ICX259AL 자료 제공

부품번호 ICX259AL 기능
기능 Diagonal 6mm (Type 1/3) CCD Image Sensor
제조업체 Sony Corporation
로고 Sony Corporation 로고


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ICX259AL 데이터시트, 핀배열, 회로
ICX259ALwww.DataSheet4U.com
Diagonal 6mm (Type 1/3) CCD Image Sensor for CCIR B/W Video Cameras
Description
The ICX259AL is an interline CCD solid-state
image sensor suitable for CCIR B/W video cameras
with a diagonal 6mm (Type 1/3) system. Compared
with the current product ICX059CL, basic
characteristics such as sensitivity, smear, dynamic
range and S/N are improved drastically from visible
light region to near infrared light region through the
adoption of EXview HAD CCDTM technology.
This chip features a field period readout system and
an electronic shutter with variable charge-storage
time.
16 pin DIP (Plastic)
Features
Sensitivity in near infrared light region
(+8dB compared with the ICX059CL, λ = 945nm)
Pin 1
High sensitivity (+7dB compared with the ICX059CL, no IR cut filter)
Low smear (–20dB compared with the ICX059CL)
High D range (+5dB compared with the ICX059CL)
High S/N
V
High resolution and low dark current
Excellent antiblooming characteristics
Continuous variable-speed shutter
No voltage adjustment
3
Pin 9 H 40
(Reset gate and substrate bias are not adjusted.)
Reset gate:
5V drive
Horizontal register: 5V drive
Optical black position
(Top View)
2
12
Device Structure
Interline CCD image sensor
Image size:
Diagonal 6mm (Type 1/3)
Number of effective pixels: 752 (H) × 582 (V) approx. 440K pixels
Total number of pixels: 795 (H) × 596 (V) approx. 470K pixels
Chip size:
6.00mm (H) × 4.96mm (V)
Unit cell size:
6.50µm (H) × 6.25µm (V)
Optical black:
Horizontal (H) direction : Front 3 pixels, rear 40 pixels
Vertical (V) direction : Front 12 pixels, rear 2 pixels
Number of dummy bits: Horizontal 22
Vertical 1 (even fields only)
Substrate material:
Silicon
TM
EXview HAD CCD is a trademark of Sony Corporation.
EXview HAD CCD is a CCD that drastically improves light efficiency by including near infrared light region as a basic structure of
HAD (Hole-Accumulation-Diode) sensor.
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E99526A99




ICX259AL pdf, 반도체, 판매, 대치품
Clock Equivalent Circuit Constant
Item
Capacitance between vertical transfer
clock and GND
Capacitance between vertical transfer
clocks
Capacitance between horizontal
transfer clock and GND
Capacitance between horizontal
transfer clocks
Capacitance between reset gate clock
and GND
Capacitance between substrate clock
and GND
Vertical transfer clock series resistor
Vertical transfer clock ground resistor
Horizontal transfer clock series resistor
Reset gate clock series resistor
Symbol
CφV1, CφV3
CφV2, CφV4
CφV12, CφV34
CφV23, CφV41
CφV13
CφV24
CφH1, CφH2
CφHH
CφRG
CφSUB
R1, R3
R2, R4
RGND
RφH
RφRG
Vφ1 Vφ2
ICX259AL
www.DataSheet4U.com
Min. Typ. Max. Unit Remarks
1200
pF
1000
pF
680 pF
330 pF
100 pF
100 pF
75 pF
30 pF
5 pF
270 pF
82
120
100
15
50
R1 CφV12 R2
CφV41
CφV1
CφV2
CφV23
CφV24
R4
CφV4 RGND CφV3
CφV34
CφV13
R3
RφH
Hφ1
CφH1
CφHH
RφH
Hφ2
CφH2
Vφ4 Vφ3
Vertical transfer clock equivalent circuit
RGφ
RφRG
Horizontal transfer clock equivalent circuit
CφRG
Reset gate clock equivalent circuit
–4–

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ICX259AL 전자부품, 판매, 대치품
ICX259AL
www.DataSheet4U.com
Clock Switching Characteristics
twh twl
tr
tf
Item Symbol
Unit Remarks
Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max.
Readout clock VT
2.3 2.5
0.5
0.5
µs
During
readout
Vertical transfer Vφ1, Vφ2,
clock
Vφ3, Vφ4
15 250 ns 1
During
imaging
Hφ1
Hφ2
During
Hφ1
parallel-serial
conversion Hφ2
26 28.5
26 28.5
5.38
26 28.5
26 28.5
5.38
6.5 9.5
6.5 9.5
0.01
0.01
6.5 9.5 ns 2
6.5 9.5
0.01
µs
0.01
Reset gate clock φRG
11 13
51
3
3 ns
Substrate clock φSUB
1.5 1.8
0.5
0.5
µs
During drain
charge
1 When vertical transfer clock driver CXD1267AN is used.
2 tf tr – 2ns, and the cross-point voltage (VCR) for the Hφ1 rising side of the Hφ1 and Hφ2 waveforms must be
at least VφH/2 [V].
two
Item Symbol
Unit Remarks
Min. Typ. Max.
Horizontal transfer clock Hφ1, Hφ2 22 26
ns 3
3 The overlap period for twh and twl of horizontal transfer clocks Hφ1 and Hφ2 is two.
–7–

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