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PDF 74LVC1G38 Data sheet ( Hoja de datos )
| Número de pieza | 74LVC1G38 | |
| Descripción | 2-input NAND gate open drain | |
| Fabricantes | NXP Semiconductors | |
| Logotipo |  |
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74LVC1G38
2-input NAND gate; open drain
Rev. 03 — 27 August 2007
www.DataSheet4U.com
Product data sheet
1. General description
The 74LVC1G38 provides a 2-input NAND function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of this
device as translator in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using IOFF. The IOFF
circuitry disables the output, preventing the damaging backflow current through the device
when it is powered down.
2. Features
I Wide supply voltage range from 1.65 V to 5.5 V
I 5 V tolerant outputs for interfacing with 5 V logic
I High noise immunity
I Complies with JEDEC standard:
N JESD8-7 (1.65 V to 1.95 V)
N JESD8-5 (2.3 V to 2.7 V)
N JESD8-B/JESD36 (2.7 V to 3.6 V).
I ESD protection:
N HBM JESD22-A114E exceeds 2000 V
N MM JESD22-A115-A exceeds 200 V
I ±24 mA output drive (VCC = 3.0 V)
I CMOS low power consumption
I Open drain outputs
I Latch-up performance exceeds 250 mA
I Direct interface with TTL levels
I Inputs accept voltages up to 5 V
I Multiple package options
I Specified from −40 °C to +125 °C.
1 page  
NXP Semiconductors
74LVC1G38www.DataSheet4U.com
2-input NAND gate; open drain
10. Static characteristics
Table 7. Static characteristics
At recommended operating conditions; voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min Typ
Tamb = −40 °C to +85 °C[1]
VIH HIGH-level input voltage VCC = 1.65 V to 1.95 V
0.65 × VCC -
VCC = 2.3 V to 2.7 V
1.7 -
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0 -
0.7 × VCC -
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
--
--
VCC = 2.7 V to 3.6 V
--
VCC = 4.5 V to 5.5 V
--
VOL LOW-level output voltage VI = VIH or VIL
IO = 100 µA; VCC = 1.65 V to 5.5 V
-
-
-
-
IO = 4 mA; VCC = 1.65 V
--
IO = 8 mA; VCC = 2.3 V
IO = 12 mA; VCC = 2.7 V
--
--
IO = 24 mA; VCC = 3.0 V
--
IO = 32 mA; VCC = 4.5 V
--
II
input leakage current
VI = 5.5 V or GND;
VCC = 0 V to 5.5 V
- ±0.1
IOZ OFF-state output current VI = VIH or VIL; VO = VCC or GND; - ±0.1
VCC = 5.5 V
IOFF power-off leakage current VI or VO = 5.5 V; VCC = 0 V
- ±0.1
ICC supply current
∆ICC
additional supply current
CI input capacitance
Tamb = −40 °C to +125 °C
VIH HIGH-level input voltage
VI = 5.5 V or GND;
VCC = 1.65 V to 5.5 V; IO = 0 A
VI = VCC − 0.6 V; IO = 0 A;
VCC = 2.3 V to 5.5 V; per pin
VCC = 1.65 V to 1.95 V
- 0.1
-5
- 2.5
0.65 × VCC -
VCC = 2.3 V to 2.7 V
1.7 -
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
2.0 -
0.7 × VCC -
VIL LOW-level input voltage VCC = 1.65 V to 1.95 V
--
VCC = 2.3 V to 2.7 V
--
VCC = 2.7 V to 3.6 V
VCC = 4.5 V to 5.5 V
--
--
Max Unit
-V
-V
-V
-V
0.35 × VCC V
0.7 V
0.8 V
0.3 × VCC V
-
0.1 V
0.45 V
0.3 V
0.4 V
0.55 V
0.55 V
±5 µA
±10 µA
±10 µA
10 µA
500 µA
- pF
-V
-V
-V
-V
0.35 × VCC V
0.7 V
0.8 V
0.3 × VCC V
74LVC1G38_3
Product data sheet
Rev. 03 — 27 August 2007
© NXP B.V. 2007. All rights reserved.
5 of 15
5 Page 
NXP Semiconductors
74LVC1G38www.DataSheet4U.com
2-input NAND gate; open drain
XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm
L1
e
1
b
23
L
4×
(2)
6
e1
5
e1
4
6× A
(2)
A1
D
SOT886
E
terminal 1
index area
01
DIMENSIONS (mm are the original dimensions)
scale
UNIT
A (1)
max
A1
max
b
D
E
e
mm
0.5
0.04
0.25
0.17
1.5
1.4
1.05
0.95
0.6
e1 L L1
0.5
0.35 0.40
0.27 0.32
Notes
1. Including plating thickness.
2. Can be visible in some manufacturing processes.
OUTLINE
VERSION
IEC
REFERENCES
JEDEC
JEITA
SOT886
MO-252
Fig 11. Package outline SOT886 (XSON6)
74LVC1G38_3
Product data sheet
Rev. 03 — 27 August 2007
2 mm
EUROPEAN
PROJECTION
ISSUE DATE
04-07-15
04-07-22
© NXP B.V. 2007. All rights reserved.
11 of 15
11 Page | ||
| Páginas | Total 15 Páginas | |
| PDF Descargar | [ Datasheet 74LVC1G38.PDF ] | |
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