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AT52BC3221AT 데이터시트 PDF




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부품번호 AT52BC3221AT 기능
기능 32-Mbit Flash 8-Mbit PSRAM Stack Memory
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AT52BC3221AT 데이터시트, 핀배열, 회로
Features
32-Mbit Flash and 4-Mbit/8-Mbit PSRAM
Single 66-ball (8 mm x 10 mm x 1.2 mm) CBGA Package
2.7V to 3.3V Operating Voltage
Flash
32-megabit (2M x 16)
2.7V to 3.3V Read/Write
Access Time – 70 ns
Sector Erase Architecture
– Sixty-three 32K Word Sectors with Individual Write Lockout
– Eight 4K Word Sectors with Individual Write Lockout
Fast Word Program Time – 15 µs
Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming from Any Sector by Suspending Erase of a
Different Sector
– Supports Reading Any Word by Suspending Programming of Any Other Word
Low-power Operation
– 12 mA Active
– 13 µA Standby
Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
VPP Pin for Write Protection and Accelerated Program/Erase Operations
RESET Input for Device Initialization
Sector Lockdown Support
Top or Bottom Boot Block Configuration Available
128-bit Protection Register
Minimum 100,000 Erase Cycles
PSRAM
8-megabit (512K x 16)
2.7V to 3.3V VCC
70 ns Access Time
Extended Temperature Range
ISB0 < 10 µA when Deep Power-Down
www.DataSheet4U.com
32-Mbit Flash +
8-Mbit PSRAM
Stack Memory
AT52BC3221A
AT52BC3221AT
Preliminary
Device Number
AT52BC3221A
AT52BC3221AT
Flash Boot
Location
Bottom
Top
Flash Plane
Configuration
32M (2M x 16)
32M (2M x 16)
PSRAM
Configuration
8M (512K x 16)
8M (512K x 16)
Rev. 3466A–STKD–11/04
1




AT52BC3221AT pdf, 반도체, 판매, 대치품
32-megabit
Flash Memory
Description
Block Diagram
www.DataSheet4U.com
The 32-megabit Flash is a a 2.7-volt memory organized as 2,097,152 words of 16 bits each.
The memory is divided into 71 sectors for erase operations. The device has CE and OE con-
trol signals to avoid any bus contention. This device can be read or reprogrammed using a
single power supply, making it ideally suited for in-system programming.
The device powers on in the read mode. Command sequences are used to place the device in
other operation modes such as program and erase. The device has the capability to protect
the data in any sector (see “Sector Lockdown” section).
To increase the flexibility of the device, it contains an Erase Suspend and Program Suspend
feature. This feature will put the erase or program on hold for any amount of time and let the
user read data from or program data to any of the remaining sectors within the memory. The
end of a program or an erase cycle is detected by the READY/BUSY pin, Data Polling or by
the toggle bit.
The VPP pin provides data protection. When the VPP input is below 0.4V, the program and
erase functions are inhibited. When VPP is at 0.9V or above, normal program and erase opera-
tions can be performed.
A six-byte command (Enter Single Pulse Program Mode) sequence to remove the requirement
of entering the three-byte program sequence is offered to further improve programming time.
After entering the six-byte code, only single pulses on the write control lines are required for
writing into the device. This mode (Single Pulse Word Program) is exited by powering down
the device, or by pulsing the RESET pin low for a minimum of 500 ns and then bringing it back
to VCC. Erase, Erase Suspend/Resume and Program Suspend/Resume commands will not
work while in this mode; if entered they will result in data being programmed into the device. It
is not recommended that the six-byte code reside in the software of the final product but only
exist in external programming code.
I/O0 - I/O15
OUTPUT
BUFFER
INPUT
BUFFER
A0 - A20
INPUT
BUFFER
ADDRESS
LATCH
Y-DECODER
X-DECODER
IDENTIFIER
REGISTER
STATUS
REGISTER
DATA
COMPARATOR
Y-GATING
MAIN
MEMORY
COMMAND
REGISTER
WRITE STATE
MACHINE
CE
WE
OE
RESET
PROGRAM/ERASE
VOLTAGE SWITCH
RDY/BUSY
VPP
VCC
GND
4 AT52BC3221A(T)
3466A–STKD–11/04

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AT52BC3221AT 전자부품, 판매, 대치품
3466A–STKD–11/04
AT52BC3221A(T)
erase/program status bit is a “0” while the erase or program operwawtiwo.nDaistasSthielleitn4Up.croogmress.
Please see “Status Bit Table” on page 11 for more details.
VPP STATUS BIT: The device provides a status bit on I/O3, which provides information
regarding the voltage level of the VPP pin. During a program or erase operation, if the voltage
on the VPP pin is not high enough to perform the desired operation successfully, the I/O3 sta-
tus bit will be a “1”. Once the VPP status bit has been set to a “1”, the system must write the
Product ID Exit command to return to the read mode. On the other hand, if the voltage level is
high enough to perform a program or erase operation successfully, the VPP status bit will out-
put a “0”. Please see “Status Bit Table” on page 11 for more details.
SECTOR LOCKDOWN: Each sector has a programming lockdown feature. This feature pre-
vents programming of data in the designated sectors once the feature has been enabled.
These sectors can contain secure code that is used to bring up the system. Enabling the lock-
down feature will allow the boot code to stay in the device while data in the rest of the device is
updated. This feature does not have to be activated; any sector’s usage as a write-protected
region is optional to the user.
At power-up or reset, all sectors are unlocked. To activate the lockdown for a specific sector,
the six-bus cycle Sector Lockdown command must be issued. Once a sector has been locked
down, the contents of the sector is read-only and cannot be erased or programmed.
SECTOR LOCKDOWN DETECTION: A software method is available to determine if program-
ming of a sector is locked down. When the device is in the software product identification
mode (see “Software Product Identification Entry/Exit” sections on page 24), a read from
address location 00002H within a sector will show if programming the sector is locked down. If
the data on I/O0 is low, the sector can be programmed; if the data on I/O0 is high, the program
lockdown feature has been enabled and the sector cannot be programmed. The software
product identification exit code should be used to return to standard operation.
SECTOR LOCKDOWN OVERRIDE: The only way to unlock a sector that is locked down is
through reset or power-up cycles. After power-up or reset, the content of a sector that is
locked down can be erased and reprogrammed.
ERASE SUSPEND/ERASE RESUME: The Erase Suspend command allows the system to
interrupt a sector or chip erase operation and then program or read data from a different sector
within the memory. After the Erase Suspend command is given, the device requires a maxi-
mum time of 15 µs to suspend the erase operation. After the erase operation has been
suspended, the system can then read data or program data to any other sector within the
device. An address is not required during the Erase Suspend command. During a sector erase
suspend, another sector cannot be erased. To resume the sector erase operation, the system
must write the Erase Resume command. The Erase Resume command is a one-bus cycle
command. The device also supports an erase suspend during a complete chip erase. While
the chip erase is suspended, the user can read from any sector within the memory that is pro-
tected. The command sequence for a chip erase suspend and a sector erase suspend are the
same.
PROGRAM SUSPEND/PROGRAM RESUME: The Program Suspend command allows the
system to interrupt a programming operation and then read data from a different word within
the memory. After the Program Suspend command is given, the device requires a maximum
of 20 µs to suspend the programming operation. After the programming operation has been
suspended, the system can then read data from any other word within the device that is not
contained in the sector in which the programming operation was suspended. An address is not
required during the program suspend operation. To resume the programming operation, the
system must write the Program Resume command. The program suspend and resume are
one-bus cycle commands. The command sequence for the erase suspend and program sus-
pend are the same, and the command sequence for the erase resume and program resume
are the same.
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관련 데이터시트

부품번호상세설명 및 기능제조사
AT52BC3221A

32-Mbit Flash 8-Mbit PSRAM Stack Memory

ATMEL Corporation
ATMEL Corporation
AT52BC3221AT

32-Mbit Flash 8-Mbit PSRAM Stack Memory

ATMEL Corporation
ATMEL Corporation

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