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PDF ZL40539 Data sheet ( Hoja de datos )
| Número de pieza | ZL40539 | |
| Descripción | Dual Output CD and DVD 4 Channel Laser Diode Driver | |
| Fabricantes | Zarlink Semiconductor | |
| Logotipo |  |
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ZL40539
Dual Output CD and DVD
4 Channel LasewwrwD.DiaotadSheeeDt4rUi.cvoemr
Data Sheet
Features
• Pin compatible with EL6839
• Dual output for CD/DVD laser
• LVDS control signal, internal 100 ohms
• Rise time 1.0 ns, Fall time 1.1 ns typical
• Low noise read channel with gain of 100x to
150 mA
• Channel 2 gain of 250x to 550 mA
• Channel 3 gain of 150x to 500 mA
• Channel 4 gain of 100x to 450 mA
• Combined total output current 700 mA
• On-chip oscillator with frequency and amplitude
control by external resistors
• Oscillator frequency to 575 MHz, amplitude to
100 mA pk to pk
• Power Up/Down control
• > 2 kV ESD Single 5 V supply (±10%)
February 2005
Ordering Information
ZL40539LCG Trays/Bake/Dry Pack
ZL40539LCF Tape/Reel Bake/Dry Pack
0°C to +70°C
• 32-pin QFN package
Applications
• DVD±RW/RAM
• DVD±R
• CD-RW
• CD-R
• Write optical drives
• Laser Diode current switch
• Supports double density DVD
EN4
P/N ENRB
EN2
P/N
EN3
P/N
Enable
INR
Chip Enable/Power
VCC_A
IN2 OUTA
GND
IN3
OUTB
IN4
VCC_B
RFA
RFB
RSA
RSB
OSCEN
SELA
Figure 1 - ZL40539 Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2004-2005, Zarlink Semiconductor Inc. All Rights Reserved.
1 page  
ZL40539
Data Sheet
www.DataSheet4U.com
Specified Electrical Performance with 15 mm Interconnect and Zarlink ZLE40539 Evaluation Board
The specified transient pulse performance in the table are results based on the electrical measurements and
simulations across full process corners using the Zarlink Evaluation Board using a 3.9 Ohm resistive load to
ground.
The track interconnect between ZL40539 and the 3.9 Ohm Resistor is 15 mm long and uses a 2 mm wide track on
single sided FR4 board. The return path is via two 2 mm wide tracks spaced 0.25 mm either side of the track
between output and the 3.9 ohm resistor. The combined forward and return path forms a co planar transmission
line with a characteristic impedance of approximately 120 ohms.
The tight coupled return paths carrying the return current reduce the effective series inductance (Leff) which can be
approximated to:-
Leff = 2 * Lint * (1 - K) + 2 * Lfix * (1 - K).
The ZLE40539 board has two positions for the Laser Diode at two different distances. (15 and 30 mm).
The measured value of Leff is 7 nH.
The estimated value of Leff = 2 * 8 (1 – 0.5) = 8 nH.
The actual pulse response achieved in an application is thus dependent on the application.
Application Layout Guide Lines
Minimize Interconnect Inductance by:
1. Using Short Interconnect Distance
2. Use wide interconnect tracks
3. Keep the return path tightly coupled to the forward path
ZL40539E Interconnect
Figure 4 - ZLE40539 Application Board Electrical Interconnect
5
Zarlink Semiconductor Inc.
5 Page 
ZL40539
Data Sheet
www.DataSheet4U.com
Electrical Characteristics - Outputs A and B - Vcc = 5 V, Tamb = 25°C, Enable = High, ChR, Ch2, Ch3, Ch4 disabled, OSCEN =
Low, unless otherwise specified.
Characteristic
Read channel output current
Channel 2 output current
Channel 3 output current
Channel 4 output current
Total output current
Value
Min. Typ. Max.
Unit
Comments
150 180
550 650
500 600
450 570
700 900
mA ChR enabled, Vout ≤ 3.0 V
mA Ch2 enabled, Vout ≤ 3.0 V
mA Ch3 enabled, Vout ≤ 3.0 V
mA Ch4 enabled, Vout ≤ 3.0 V
mA ChR, 2, 3, 4 enabled,
Vout ≤ 3.0 V
Type
B
A
A
A
B
Read Output current, zero input
Ch2 Output Current, zero input
Ch3 Output Current, zero input
Ch4 Output Current, zero input
1.3 2.5 mA INR = 0 µA, ChR enabled
1.5 10 mA IN2 = 0 µA, Ch2 enabled
02
IN3 = 0 µA, Ch3 enabled
02
IN4 = 0 µA, Ch4 enabled
A
Input impedance
(INR, IN2, IN3, IN4)
410 500 590
W Rin to GND
B
Iout supply sensitivity, any
channel
Iout temperature sensitivity,
any channel
Iout current output noise
+3.0
+4.2
300
3
+6.0
%/V
ppm/
°C
nA/
√Hz
Iout = 80 mA, Rdiode = 3.9Ω
Vdiode = 1.6 V
Iout = 160 mA,
Iin temp coefficient = 0 ppm/°C
Iout = 50 mA InR=500 uA
B
C
B
Current gain, ChR, best fit *
85 100 115 mA/ Iout = 20 mA to 60 mA † *
mA ChR enabled
Current gain, Ch2, best fit **
205 250 275 mA/ Iout = 40 mA to 120 mA † **
mA Ch2 enabled
Current gain, Ch3, best fit **
120 150 180 mA/ Iout = 40 mA to 120 mA † **
mA Ch3 enabled
Current gain, Ch4, best fit **
85 100 115 mA/ Iout = 40 mA to 120 mA † **
mA Ch4 enabled
Output current offset, ChR, best -1 +3 8 mA Iout = 20 mA to 60 mA † *
fit ChR enabled
A
A
A
A
A
11
Zarlink Semiconductor Inc.
11 Page | ||
| Páginas | Total 26 Páginas | |
| PDF Descargar | [ Datasheet ZL40539.PDF ] | |
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