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PDF RD74LVC1G32 Data sheet ( Hoja de datos )

Número de pieza RD74LVC1G32
Descripción 2-input OR Gate
Fabricantes Renesas Technology 
Logotipo Renesas Technology Logotipo



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RD74LVC1G32
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2–input OR Gate
REJ03D0511-0100
Rev.1.00
Oct. 06, 2005
Description
The RD74LVC1G32 has two–input OR gate in a 5-pin package. Low voltage and high-speed operation is suitable for
the battery powered products (e.g., notebook computers), and the low power consumption extends the battery life.
Features
The basic gate function is lined up as renesas uni logic series.
Supply voltage range: 1.65 to 5.5 V
Operating temperature range: –40 to +85°C
All inputs: VIH (Max.) = 5.5 V (@VCC = 0 V to 5.5 V)
All outputs: VO (Max.) = 5.5 V (@VCC = 0 V)
Output current:
±4 mA (@VCC = 1.65 V)
±8 mA (@VCC = 2.3 V)
±24 mA (@VCC = 3.0 V)
±32 mA (@VCC = 4.5 V)
Ordering Information
Package Code
Part Name
Package Type
(Previous Code)
RD74LVC1G32WPE WCSP-5 pin
SXBG0005LB-A
(TBS-5CV)
Package
Abbreviation
WP
Taping Abbreviation
(Quantity)
E (3,000 pcs/reel)
Article indication
Marking
Year code
Month code
E4YM
Rev.1.00 Oct. 06, 2005 page 1 of 7

1 page




RD74LVC1G32 pdf
RD74LVC1G32
Switching Characteristics
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
1.9 7.2
2.8 8.0
Unit
ns
Test Conditions
CL = 15 pF, RL = 1 M
CL = 30 pF, RL = 1.0 k
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VCC = 1.8 ± 0.15 V
FROM TO
(Input) (Output)
A or B Y
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
0.8 4.4
1.2 5.5
Unit
ns
Test Conditions
CL = 15 pF, RL = 1 M
CL = 30 pF, RL = 500
VCC = 2.5 ± 0.2 V
FROM TO
(Input) (Output)
A or B Y
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
0.9 3.6
1.1 4.5
Unit
ns
Test Conditions
CL = 15 pF, RL = 1 M
CL = 50 pF, RL = 500
VCC = 3.3 ± 0.3 V
FROM TO
(Input) (Output)
A or B Y
Item
Propagation delay time
Symbol
tPLH
tPHL
Ta = –40 to 85°C
Min Max
0.8 3.4
1.0 4.0
Unit
ns
Test Conditions
CL = 15 pF, RL = 1 M
CL = 50 pF, RL = 500
VCC = 5.0 ± 0.5 V
FROM TO
(Input) (Output)
A or B Y
Operating Characteristics
Item
Power dissipation capacitance
Symbol
CPD
VCC (V)
1.8
2.5
3.3
5.0
Ta = 25°C
Min Typ Max
— 20 —
— 20 —
— 21 —
— 22 —
Unit Test Conditions
pF f = 10 MHz
Test Circuit
From Output
Measurement point
CL* RL
Note: CL includes probe and jig capacitance.
Rev.1.00 Oct. 06, 2005 page 5 of 7

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