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Número de pieza | HYS72T512020HR-5-A | |
Descripción | 240-Pin Registered-DDR2-SDRAM Modules | |
Fabricantes | Qimonda | |
Logotipo | ||
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HYS72T512020HR–[3.7/5]–A
240-Pin Registered-DDR2-SDRAM Modules
DDR2 SDRAM
RoHS Compliant
Internet Data Sheet
Rev. 1.11
1 page Internet Data Sheet
www.DataSheet4U.com
HYS72T512020HR–[3.7/5]–A
Registered DDR2 SDRAM Modules
2 Pin Configuration
2.1 Pin Configuration
The pin configuration of the Registered DDR2 SDRAM DIMM
is listed by function in Table 5 (240 pins). The abbreviations
used in columns Pin and Buffer Type are explained in Table 6
and Table 7 respectively. The pin numbering is depicted in
Figure 1.
Ball No.
Name
Clock Signals
185
186
52
171
CK0
CK0
CKE0
CKE1
NC
Control Signals
193
76
S0
S1
NC
192
74
73
18
Address Signals
71
190
54
RAS
CAS
WE
RESET
BA0
BA1
BA2
NC
Pin Buffer Function
Type Type
TABLE 5
Pin Configuration of RDIMM
I SSTL Clock Signal CK0, Complementary Clock Signal CK0
I SSTL
I SSTL Clock Enables 1:0
I SSTL Note: 2-Ranks module
NC —
Not Connected
Note: 1-Rank module
I SSTL Chip Select Rank 1:0
I SSTL Note: 2-Ranks module
NC —
Not Connected
Note: 1-Rank module
I SSTL Row Address Strobe (RAS), Column Address Strobe (CAS), Write
I SSTL Enable (WE)
I SSTL
I CMOS Register Reset
I SSTL Bank Address Bus 1:0
I SSTL
I SSTL Bank Address Bus 2
I SSTL Not Connected
Rev. 1.11, 2006-09
03062006-TZ8J-GNDA
6
5 Page Internet Data Sheet
www.DataSheet4U.com
Ball No.
Name
Other Pins
19, 55, 68, 102, NC
137, 138, 173, 220,
221
195 ODT0
77 ODT1
NC
Abbreviation
SSTL
CMOS
OD
Abbreviation
I
O
I/O
AI
PWR
GND
NU
NC
HYS72T512020HR–[3.7/5]–A
Registered DDR2 SDRAM Modules
Pin Buffer Function
Type Type
NC —
Not connected
I SSTL On-Die Termination Control 1:0
I SSTL Note: 2-Ranks module
NC —
Note: 1-Rank modules
TABLE 6
Abbreviations for Buffer Type
Description
Serial Stub Terminated Logic (SSTL_18)
CMOS Levels
Open Drain. The corresponding pin has 2 operational states, active low and tristate,
and allows multiple devices to share as a wire-OR.
Description
Standard input-only pin. Digital levels.
Output. Digital levels.
I/O is a bidirectional input/output signal.
Input. Analog levels.
Power
Ground
Not Usable
Not Connected
TABLE 7
Abbreviations for Pin Type
Rev. 1.11, 2006-09
03062006-TZ8J-GNDA
12
11 Page |
Páginas | Total 37 Páginas | |
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Número de pieza | Descripción | Fabricantes |
HYS72T512020HR-5-A | 240-Pin Registered-DDR2-SDRAM Modules | Qimonda |
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