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LC82151 데이터시트 PDF
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PDF 형식의 LC82151 자료 제공
| 부품번호 | LC82151 기능 |
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| 기능 | Single-Chip Facsimile Controller | ||
| 제조업체 | Sanyo Semicon Device | ||
| 로고 |  |
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전체 8 페이지수
No. *5601
CMOS LSI
LC82151
Single-Chip Facsimile Controller
Preliminary
Overview
The LC82151 is a facsimile controller that integrates the
main functions required by facsimile systems on a single
chip. The LC82151 includes a FAX modem with ADPCM
and HDLC functions, image processing functions that can
create high-quality binary image data without external
memory, a CODEC accelerator, a CPU and CPU
peripheral circuits, general-purpose I/O ports, and other
functions. A facsimile system with excellent cost-
performance characteristics can be created easily by
providing ROM and RAM.
Functions
• CPU and peripheral circuits
– High-speed 16-bit CPU (65C816) operating at
7.4 MHz
– 16-MB program address space
– CODEC accelerator
– Two-channel DMA controller
– Four 16-bit timers
– 16-bit watchdog timer
– TPH interface
– Serial I/O interface
– Parallel I/O: 10 to 43 pins
• Image processing
– Processes 2048 pixels per line
– Processing speed: 540 ns per pixel (maximum)
– Built-in 8-bit A/D converter (Includes a sensor signal
delay function.)
– Sensor drive circuit (Supports CCDs and all major
CIS devices.)
– Distortion correction (White distortion: 8-pixel
averaging correction, black correction: Allows the
black correction subtraction data to be set.)
– γ-correction (Supports user-defined correction curves.)
– Simple binary conversion processing (fixed threshold
and density-adaptive threshold)
– Halftone processing error diffusion method (64 levels)
– Image reduction (decimation, fine black line retention,
and fine white line retention)
• Modem
– Group 3 FAX modem
ITU-T V.29 (9600, 7200, and 4800 bps)
ITU-T V.27ter (4800 and 2400 bps)
ITU-T V.21ch2 (300 bps)
– Simultaneous high/low-speed wait function
– Short training function (ITU-T V.27ter only)
– HDLC function (for all transmission speeds)
– Synthesizer function
– Caller ID function
Bell 202 (1200 bps)
ITU-T V.23 (1200 bps)
– ADPCM function
Encoding: 2, 3, or 4 bits
Sampling frequencies: 9.6, 7.2, 4.8, and 3.6 kHz
– RTC low-voltage backup
– 5-V single-voltage power supply
Package Dimension
unit: mm
3214-SQFP144
[LC82151]
SANYO: SQFP144
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110 JAPAN
43097 (OT) No. 5601-1/8
 
LC82151
Continued from preceding page.
Pin No.
Pin
I/O
Pin function
51 TEST1
I
52 TEST0
I Test pins
53 TESTOUT
I
54 VDD
P Power supply
55 VSS
P Ground
56 ROSC1
57 ROSC2
I
RTC crystal oscillator connections
O
58 BACKUP
I Low power mode input
59 RESET
I System reset signal
60 AVDD
61 AVSS
62 AIN
P Analog system power supply
P Analog system ground
I Sensor signal input
63 TEMP
I Thermistor input
64 ATAP O A/D converter reference voltage output
65 DAREFH
I D/A converter high-level reference voltage input
66 DAREFL
I D/A converter low-level reference voltage input
67 TXA
O Modem analog transmit output
68 RXA
I Modem analog receive input
69 PGCO
O Modem gain adjustment output
70 PGCI
I Modem gain adjustment input
71 VREF
I Modem analog block reference input
72 VSS
P Ground
73 VDD
P Power supply
74 SH O Image sensor start pulse
75 RS O Image sensor reset pulse
76 ACLK1
77 ACLK2
O
Image sensor data transfer clocks
O
78 ASAMP O Built-in A/D converter sampling point monitor signal
79 PXD7/PC7 B
80 PXD6/PC6 B
81 PXD5/PC5 B
82 PXD4/PC4
83 PXD3/PC3
B
Image data output/general-purpose port C
B
84 PXD2/PC2 B
85 PXD1/PC1 B
86 PXD0/PC0 B
87 PDREQ/PF7 B Image data DMA request signal/general-purpose port F
88 PDACK/PF6 B Image data DMA acknowledge signal/general-purpose port F
89 EYED/PF5 B Eye pattern data output/general-purpose port F
90 VDD
91 VSS
92 EYECLK/PF4
P Power supply
P Ground
B Eye pattern data clock/general-purpose port F
93 EYESYNC/PF3 B Eye pattern data synchronizing signal/general-purpose port F
94 TO1/PF2
95 TO0/PF1
B
Timer outputs/general-purpose port F
B
96 PCK/SCLK/PE7 B Thermal head data transfer clock/serial I/O clock/general-purpose port E
97 PDATA/TXD/PE6 B Thermal head serial output data/serial I/O send data/general-purpose port E
98 EXCLK/PE5 B Thermal head control external clock/general-purpose port E
99 LATCH/RXD/PE4 B Thermal head data latch signal/serial I/O receive data/general-purpose port E
100 STB3/PE3 B
101 STB2/PE2
102 STB1/PE1
B
Thermal head strobe signal/general-purpose port E
B
103 STB0/PE0 B
104 HVON/PF0 B Head power on/off control signal/general-purpose port F
105 PROTECT/PG0 B Head protection abnormality indication signal input/general-purpose port G
Continued on next page.
No. 5601-4/8
4페이지 
LC82151
Specifications
Absolute Maximum Ratings at Ta = 25°C, VSS = 0 V
Parameter
Maximum supply voltage
Input and output voltage
Allowable power dissipation
Operating temperature
Storage temperature
Soldering temperature
Symbol
VDD max
VI, VO
Pd max
Topr
Tstg
Conditions
Ta ≤ 70°C
Manual soldering (3 seconds)
Reflow soldering (10 seconds)
Ratings
–0.3 to +7.0
–0.3 to VDD +0.3
550
–30 to +70
–55 to +125
350
235
Unit
V
V
mW
°C
°C
°C
°C
Allowable Operating Ranges at Ta = –30 to +70°C, VSS = 0 V
Parameter
Symbol
Conditions
Supply voltage
Input voltage
VDD
VIN
Electrical Characteristics at Ta = –30 to +70°C, VDD = 4.5 to 5.5 V
min
4.5
0
Parameter
Input high-level voltage
Input low-level voltage
Input leakage current
Output high-level voltage
Output low-level voltage
Output leakage current
Charge pump output current
Vref input voltage
Vref impedance
Input voltage range
Operating voltage range
Output impedance
Oscillator frequency
Current drain
Symbol
VIH1
VIL1
IL
VOH
VOL
IOZ
IPOZ
INOZ
VREF
VREF
VIA
VOA
RO
fCLK1
fCLK2
IDD1
IDD2
Conditions
IOH = –4mA
IOL = 4mA
When outputs are high impedance
PHASEO = 2 V
PHASEO = 2 V
VREF
VREF
RXA, PGCI
TXA, PGCO
TXA, PGCO
XTAL1, XTAL2, CLKIN
ROSC1, ROSC 2
Operating
In backup mode, VDD = 2.5 V, BACKUP = 0
min
2.2
–10
2.4
–10
7
–8
1
VDD × 0.2
VDD × 0.2
Ratings
typ
max
5.5
VDD
Ratings
typ
max
0.8
+10
15
–15
VDD/2
0.4
+10
27
–28
29.4912
32.768
100
5
VDD × 0.8
VDD × 0.8
7.0
Unit
V
V
Unit
V
V
µA
V
V
µA
mA
mA
V
MΩ
V
V
kΩ
MHz
kHz
mA
µA
Power on Timing
Applications must control the timing of the power on sequence carefully. Although AVSS and VSS are completely
isolated internally in the LC82151, AVDD and VDD are connected through the substrate. This means that there must be
no potential difference between AVDD and VDD. Also, the power supply voltage rise and fall times must be under 3 ms.
Analog Characteristic
D/A Converter
Parameter
Resolution
Reference resistors value
Symbol
Conditions
DAREFL, DAREFH
Ratings
Unit
min typ max
6 bit
5.0 kΩ
A/D Converter at an ATAP potential of 4.2 V
A/D Converter
Parameter
Resolution
Linearity error
Differential linearity error
Symbol
Conditions
Ratings
Unit
min typ max
8 bit
±1 LSB
±1 LSB
No. 5601-7/8
7페이지 | |||
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관련 데이터시트
| 부품번호 | 상세설명 및 기능 | 제조사 |
| LC82151 | Single-Chip Facsimile Controller | Sanyo Semicon Device |
| DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |