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Ordering number : ENN*6694

CMOS IC

LC863264/56/48/40A

8-Bit Single Chip Microcontroller

Preliminary

Overview

The LC863264/56/48/40A are 8-bit single chip microcontrollers with the following on-chip functional blocks:

- CPU : Operable at a minimum bus cycle time of 0.424µs

- On-chip ROM capacity

Program ROM : 64K/56K/48K/40K bytes

CGROM : 16K bytes

- On-chip RAM capacity : 640 bytes

- OSD RAM : 352 × 9 bits

- Closed-Caption TV controller and the on-screen display controller

- Closed-Caption data slicer

- Four channels × 8-bit AD Converter

- Three channels × 7-bit PWM

- Two 16-bit timer/counters, 14-bit base timer

- 8-bit synchronous serial interface circuit

- IIC-bus compliant serial interface circuit (Multi-master type)

- ROM correction function

- 16-source 10-vectored interrupt system

- Integrated system clock generator and display clock generator

Only one X’tal oscillator (32.768kHz) for PLL reference is used for both generators

TV control and the Closed Caption function

All of the above functions are fabricated on a single chip.

Ver.0.91

51299

91400 RM (IM) HS No.6694-1/20

LC863264/56/48/40A

- Interrupt priority control

Three interrupt priorities are supported (low, high and highest) and multi-level nesting is possible. Low or high

priority can be assigned to the interrupts from 3 to 10 listed above. For the external interrupt INT0 and INT1, high

or highest priority can be set.

(15) Sub-routine stack level

- A maximum of 128 levels (stack is built in the internal RAM)

(16) Multiplication/division instruction

- 16 bits × 8 bits (7 instruction cycle times)

- 16 bits / 8 bits (7 instruction cycle times)

(17) 3 oscillation circuits

- Built-in RC oscillation circuit used for the system clock

- Built-in VCO circuit used for the system clock and OSD

- X’tal oscillation circuit used for base timer, system clock and PLL reference

(18) Standby function

- HALT mode

The HALT mode is used to reduce the power dissipation. In this operation mode, the program execution is

stopped. This mode can be released by the interrupt request or the system reset.

- HOLD mode

The HOLD mode is used to stop the oscillations; RC (internal), VCO, and X’tal oscillations. This mode can be

released by the following conditions.

• Pull the reset terminal ( RES ) to low level.

• Feed the selected level to either P70/INT0 or P71/INT1.

• Input the interrupt condition to Port 0.

(19) Package

- DIP42S

- QIP48E

(20) Development tools

- Flash EEPROM:

- Evaluation chip:

- Emulator:

2 Flash microcontrollers are available:LC86F3264A,LC86F3248A. Flash version is different

depending on which microcontroller is used.

LC86F3264A (LC863264A / LC863256A) (under development)

LC86F3248A (LC863248A / LC863240A)

LC863096

EVA86000 (main) + ECB863200 (evaluation chip board)

+ POD863200 (pod: DIP42S) or POD863201 (QIP48E)

No.6694-4/20

Pin Description

LC863264/56/48/40A

Pin Description Table

Terminal

I/O

VSS -

XT1 I

XT2 O

VDD

-

RES I

FILT

O

CVIN

I

VS I

HS I

RO

GO

BO

IO

BL O

Port 0

P00 - P07

I/O

Port 1

P10 - P17

I/O

Port 6

P60 - P63

I/O

Function Description

Negative power supply

Input terminal for crystal oscillator

Output terminal for crystal oscillator

Positive power supply

Reset terminal

Filter terminal for PLL

Video signal input terminal

Vertical synchronization signal input terminal

Horizontal synchronization signal input terminal

Red (R) output terminal of RGB image output

Green (G) output terminal of RGB image output

Blue (B) output terminal of RGB image output

Intensity ( I ) output terminal of RGB image output

Fast blanking control signal

Switch TV image signal and caption/OSD image signal

•8-bit input/output port,

Input/output can be specified in nibble unit

•Other functions

HOLD release input

Interrupt input

•8-bit input/output port

Input/output can be specified in a bit

•Other functions

P10 SIO0 data output

P11 SIO0 data input/bus input/output

P12 SIO0 clock input/output

P13 PWM1 output

P14 PWM2 output

P15 PWM3 output

P17 Timer1 (PWM) output

•4-bit input/output port

Input/output can be specified for each bit

•Other functions

P60 IIC0 data I/O

P61 IIC0 clock output

P62 IIC1 data I/O

P63 IIC1 clock output

Option

Pull-up resistor

provided/not provided

Output Format

CMOS/Nch-OD

Output Format

CMOS/Nch-OD

No.6694-7/20

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