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PDF K4T1G044QA-ZCE6 Data sheet ( Hoja de datos )
| Número de pieza | K4T1G044QA-ZCE6 | |
| Descripción | 1Gb A-die DDR2 SDRAM Specification | |
| Fabricantes | Samsung semiconductor | |
| Logotipo |  |
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1G A-die DDR2 SDRAM
wwDwD.DaRta2SheSetD4U.RcoAm M
1Gb A-die DDR2 SDRAM Specification
Version 1.1
August 2005
INFORMATION IN THIS DOCUMENT IS PROVIDED IN RELATION TO SAMSUNG PRODUCTS,
AND IS SUBJECT TO CHANGE WITHOUT NOTICE.
NOTHING IN THIS DOCUMENT SHALL BE CONSTRUED AS GRANTING ANY LICENSE,
EXPRESS OR IMPLIED, BY ESTOPPEL OR OTHERWISE,
TO ANY INTELLECTUAL PROPERTY RIGHTS IN SAMSUNG PRODUCTS OR TECHNOLOGY. ALL
INFORMATION IN THIS DOCUMENT IS PROVIDED
ON AS "AS IS" BASIS WITHOUT GUARANTEE OR WARRANTY OF ANY KIND.
1. For updates or additional information about Samsung products, contact your nearest Samsung office.
2. Samsung products are not intended for use in life support, critical care, medical, safety equipment, or similar
applications where Product failure could result in loss of life or personal or physical harm, or any military or
defense application, or any governmental procurement to which special terms or provisions may apply.
* Samsung Electronics reserves the right to change products or specification without notice.
Page 1 of 28
Rev. 1.1 Aug. 2005
1 page  
1G A-die DDR2 SDRAM
wwDwD.DaRta2SheSetD4U.RcoAm M
x8 package pinout (Top View) : 68ball FBGA Package (60balls + 8balls of dummy balls)
1
NC
2
NC
3
VDD
DQ6
VDDQ
NU/
RDQS
VSSQ
DQ1
VSS
DM/
RDQS
VDDQ
DQ4 VSSQ DQ3
VDDL
VREF
CKE
VSS
WE
BA2
VSS
BA0
A10/AP
A3
BA1
A1
A5
A7 A9
VDD
A12
NC
NC
NC
A
B
C
D
E
F
G
H
J
K
L
M
N
P
R
T
U
V
W
7 89
NC
NC
VSSQ DQS VDDQ
DQS VSSQ
VDDQ DQ0
DQ7
VDDQ
DQ2 VSSQ DQ5
VSSDL
RAS
CK
CK
VDD
ODT
CAS
A2
A6
CS
A0
A4
VDD
A11 A8 VSS
NC
A13
NC
NC
Notes:
1. Pins F3 and E2 have
identical capacitance as
pins F7 and E8.
2. For a read, when enabled,
strobe pair RDQS &
RDQS are identical in
function and timing to
strobe pair DQS & DQS
and input masking
function is disabled.
3. The function of DM or
RDQS/RDQS are enabled
by EMRS command.
4. VDDL and VSSDL are
power and ground for the
DLL.
Ball Locations (x8)
: Populated Ball
+ : Depopulated Ball
Top View (See the balls through the Package)
123456789
A + + + ++
B + + + + + ++ ++
C + + + + + ++ ++
D + + + + + ++ ++
E + ++
F + ++
G + ++
H + ++
J + ++
K+
+ ++
L
+ ++
+
M+
+ ++
N
+ ++
+
P+
+ ++
R
+ ++
+
T + + + + + ++ ++
U + + + + + ++ ++
V + + + + + ++ ++
W + + + ++
Page 5 of 28
Rev. 1.1 Aug. 2005
5 Page 
1G A-die DDR2 SDRAM
wwDwD.DaRta2SheSetD4U.RcoAm M
Absolute Maximum DC Ratings
Symbol
Parameter
Rating
Units
Notes
VDD Voltage on VDD pin relative to VSS
- 1.0 V ~ 2.3 V
V1
VDDQ
Voltage on VDDQ pin relative to VSS
- 0.5 V ~ 2.3 V
V1
VDDL
Voltage on VDDL pin relative to VSS
- 0.5 V ~ 2.3 V
V1
VIN, VOUT Voltage on any pin relative to VSS
- 0.5 V ~ 2.3 V
V1
TSTG
Storage Temperature
-55 to +100
°C 1, 2
Note :
1. Stresses greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
Exposure to absolute maximum rating conditions for extended periods may affect reliability.
2. Storage Temperature is the case surface temperature on the center/top side of the DRAM. For the measurement conditions, please refer to JESD51-2
standard.
AC & DC Operating Conditions
Recommended DC Operating Conditions (SSTL - 1.8)
Symbol
Parameter
Min.
Rating
Typ.
Max.
Units
Notes
VDD Supply Voltage
1.7 1.8 1.9
V
VDDL
VDDQ
VREF
VTT
Supply Voltage for DLL
Supply Voltage for Output
Input Reference Voltage
Termination Voltage
1.7
1.7
0.49*VDDQ
VREF-0.04
1.8
1.8
0.50*VDDQ
VREF
1.9
1.9
0.51*VDDQ
VREF+0.04
V
V
mV
V
4
4
1,2
3
Note : There is no specific device VDD supply voltage requirement for SSTL-1.8 compliance. However under all conditions VDDQ must be less than or equal
to VDD.
1. The value of VREF may be selected by the user to provide optimum noise margin in the system. Typically the value of VREF is expected to be about 0.5
x VDDQ of the transmitting device and VREF is expected to track variations in VDDQ.
2. Peak to peak AC noise on VREF may not exceed +/-2% VREF(DC).
3. VTT of transmitting device must track VREF of receiving device.
4. AC parameters are measured with VDD, VDDQ and VDDL tied together.
Page 11 of 28
Rev. 1.1 Aug. 2005
11 Page | ||
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