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PDF AIT1042 Data sheet ( Hoja de datos )
| Número de pieza | AIT1042 | |
| Descripción | Integrated Digital Tuner with RF and IF Gain Control | |
| Fabricantes | ANADIGICS | |
| Logotipo |  |
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FEATURES
• Complete Integrated RF Tuner: Includes
Upconverter with RF Gain Control,
Downconverter, Digital IF Amplifier with Gain
Control, Dual PLL, and VCOs with integrated
tanks
• IF Output - 35 to 50 MHz
• 54 to 1002 MHz Operation
• Operates from a Single +5 V Supply
• Integrated Oscillator Tank Circuits
• 78 dB Gain (including external filter losses)
through Digital Output
• 35 dB RF Gain Control Range
• 45 dB IF Gain Control Range
• 2-Wire Serial Programming with 4 Addresses for
Multiple Tuner Applications
• Programmable Power-Down Mode
• Programmable Charge Pump Currents
• Materials set consistent with RoHS directives
APPLICATIONS
• CATV Tuners
• HDTV Tuners
• Set-Top Boxes
• PC TV Tuner Cards or Tuner-on-Board
AIT1042
Intwewgwr.aDtaetadShDeiegt4itUa.cloTmuner
with RF and IF Gain Control
PRELIMINARY DATA SHEET - Rev 1.0
S38 Package
48 Pin QFN
7 mm x 7 mm x 1 mm
PRODUCT DESCRIPTION
The AIT1042 Integrated Digital Tuner with RF and IF
Gain Control is a complete 1 GHz bandwidth tuner IC
specifically designed to support digital video and data
applications. It combines GaAs and Silicon technology
to integrate the upconverter, downconverter, VCO,
synthesizer, IF amplifier, RF gain control and IF gain
control functions of a double-conversion tuner into
one small package.
Figure 1: Functional Block Diagram
02/2009
1 page  
AIT1042
Table 4: DC Electrical Specifications
(TC = +55 °C, VDD = +5.0 V)
PARAMETER
MIN TYP MAX
www.DataSheet4U.com
UNIT
RF Gain Control Current
- 100 -
A
IF Gain Control Current
- 100 -
A
Total Supply Current
- 320 -
mA
Total Power Consumption
- 1600 -
mW
Standby Current
- 125 -
mA
PARAMETER
Table 5: AC Electrical Specifications
(TC = +55 °C, VDD = +5.0 V, fIF1 = 1690 MHz, fIF2 = 45.75 MHz)
MIN TYP MAX UNIT
COMMENTS
Conversion Gain (2), (3), (4)
Channel Flatness
- 78 -
- 0.5 -
dB IF Output (pins 41 & 42)
dB 6 MHz Bandwidth
SSB Noise Figure
- 8 - dB Measured at max gain
Input Return Loss
3 - - dB 75 Impedance without match
Composite LO Phase Noise
- -85 - dBc/Hz 10 kHz Offset
RF Gain Control Range
- 40 -
dB
max gain at VRFAGC = +3 V
min gain at VRFAGC = +0.5 V
Digital IF Gain Control Range
- 45 -
dB
max gain at VIFAGC = +3 V
min gain at VIFAGC = +0.5 V
Final IF Output Voltage (4)
- 1000 -
mVP-P IF Output (pins 41 & 42)
CSO
- -55 -
dBc 129 Channels, +3 dBmV each
CTB
- -63 -
dBc 129 Channels, +3 dBmV each
XMOD
- -57 -
dBc
129 Channels, +3 dBmV each
15.75 kHz AM-modulated
Power Supply Rejection to 1 MHz 20
-
-
dB
Notes:
1. All specifications as measured in ANADIGICS test fixture with a 1st IF filter loss of 4 dB and a 2nd IF filter loss of 15 dB.
(2) At maximum RF and IF AGC gain settings, where applicable.
(3) Including nominal 1st and 2nd IF filter losses of 4 dB and 15 dB, respectively.
(4) IF output measured with a 1 k differential load across pins 41 and 42.
PRELIMINARY DATA SHEET - Rev 1.0
02/2009
5
5 Page 
AIT1042
LOGIC PROGRAMMING
This section describes the programming interface for
the ANADIGICS AIT1042 integrated tuner.
PHYSICAL INTERFACE
Hosts that conform to the I2C-Bus Specification
standard can be used to program the AIT1042. The
physical layer interface is a two-wire serial bus using
CLOCK and DATA digital lines. The nominal bit rate of
the interface is 400 kbits/sec. For data transmission,
the signal on the DATA line must be stable when
the CLOCK signal is high, and the state of the data
must change only while the CLOCK signal is low. A
logic level transition on the DATA line during a high
CLOCK signal indicates the beginning or end of a data
transmission, as specified in the following sections and
shown in Figure 4.
Start
Indicator:
CLOCK
DATA
Table 7: Address Select Decoding
(VDDw=w+w5.DVa)taSheet4U.com
Pin 25 VAS Voltage
Address (Hex)
1.1 to 1.7 V
C0
0 to 0.8 V
C2
2.1 to 2.7 V
C4
4.2 V to VDD
C6
Sending Data
If the received address byte matches the address set
by the VAS voltage, the AIT1042 will acknowledge by
pulling the data low before the 9th positive clock edge.
The host can then begin sending programming data in
8-bit words. The MSB is sent first and the LSB last.
The AIT1042 acknowledges receipt by pulling the
DATA line low for one clock pulse after each received
byte. The data acknowledgement tells the host it may
send the next data word. Each group of three data
words (24 bits total) is used to program one of seven
registers described below.
Stop
Indicator:
CLOCK
DATA
Figure 4: Transmission Indicators
Completing Data Transmission
After sending the final data word, the host sends a Stop
indicator to mark the end of data transmission. A Stop is
indicated by a low-to-high transition of the DATA signal
while the CLOCK signal is held high. After receiving
the Stop indicator, the AIT1042 ceases to send further
acknowledgements and begins to monitor the CLOCK
and DATA signals for the next Start indicator.
ADDRESSING THE AIT1042
The AIT1042 monitors the CLOCK and DATA signals
for a Start indication from the host. A Start is indicated
by a high-to-low transition of the DATA signal while the
CLOCK signal is high. Immediately following the Start
indicator, the host sends an 8-bit address word to the
AIT1042. Address words depend on the voltage on
Pin 25 (VAS), as shown in Table 7 (the MSB is sent
first, LSB last). Once the AIT1042 has recognized the
Start indicator and a valid address word, it sends an
address acknowledgement to the host by pulling the
DATA line low for one clock pulse. The host can then
begin to send data to program the AIT1042.
Note: The Stop indicator does not directly control when
the programming data is latched or takes effect; the
data takes effect immediately following the receipt of
each three-word block of data, which represents a
complete 24-bit divider register.
Re-sending Data
If, for some reason, the data transmission fails or is
interrupted, the host can resend the data. To resend
data, a new Start indicator and address word must be
sent prior to any data words.
PRELIMINARY DATA SHEET - Rev 1.0
02/2009
11
11 Page | ||
| Páginas | Total 19 Páginas | |
| PDF Descargar | [ Datasheet AIT1042.PDF ] | |
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