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부품번호 | TSL1402R 기능 |
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기능 | 256 x 1 LINEAR SENSOR ARRAY WITH HOLD | ||
제조업체 | TAOS | ||
로고 | |||
전체 14 페이지수
r
r
D 256 × 1 Sensor-Element Organization
D 400 Dots-Per-Inch (DPI) Sensor Pitch
D High Linearity and Uniformity
D Wide Dynamic Range . . . 4000:1 (72 dB)
D Output Referenced to Ground
D Low Image Lag . . . 0.5% Typ
D Operation to 8 MHz
D Single 3-V to 5-V Supply
D Rail-to-Rail Output Swing (AO)
D No External Load Resistor Required
D Replacement for TSL1402
TSL1402R
256 × 1 LINEAR SENSOR ARRAY WITH HOLD
www.DTaAtOaSS0h4e1Fet−4AUP.cRoILm2007
VDD 1
SI1 2
CLK 3
AO1 4
GND 5
SO2 6
NC 7
ÉÉÉÉÉÇÇÇÇÇ(TOP VIEW)
14 NC
13 SO1
12 GND
11 NC
10 SI2
9 NC
8 AO2
NC − No internal connection
Description
The TSL1402R linear sensor array consists of two sections of 128 photodiodes each and associated charge
amplifier circuitry, aligned to form a contiguous 256 × 1 pixel array. The device incorporates a pixel data-hold
function that provides simultaneous integration start and stop times for all pixels. The pixels measure 63.5 μm
by 55.5 μm, with 63.5-μm center-to-center spacing and 8-μm spacing between pixels. Operation is simplified
by internal logic requiring only a serial-input pulse (SI) and a clock.
The TSL1402R is intended for use in a wide variety of applications including mark and code reading, OCR and
contact imaging, edge detection and positioning, and optical encoding.
Functional Block Diagram (each section − pin numbers apply to section 1)
Pixel 1
1 Integrator
S1 2 Reset
2
_1
+ S2
Sample/Hold/
Output
3
Pixel
2
Pixel
3
Pixel
128
Analog
Bus
Output
Buffer
Hold
Q1
Switch Control Logic
Q2
Q3
Q128
Gain
Trim
1 VDD
4
AO
5
GND
13 SO
CLK 3
SI 2
128-Bit Shift Register
The
LUMENOLOGY
r
Company
Texas
Advarnced
Optoelectronic
Solutions
Inc.
1001 Klein Road S Suite 300 S Plano, TX 75074 S (972r) 673-0759
www.taosinc.com
Copyright E 2007, TAOS Inc.
1
TSL1402R
256 × 1 LINEAR SENSOR ARRAY WITH HOLD
TAOS041F − APRIL 2007
www.DataSheet4U.com
Absolute Maximum Ratings†
Supply voltage range, VDD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to 6 V
Input voltage range, VI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −0.3 V to VDD + 0.3V
Input clamp current, IIK (VI < 0) or (VI > VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −20 mA to 20 mA
Output clamp current, IOK (VO < 0 or VO > VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 mA to 25 mA
Voltage range applied to any output in the high impedance or power-off state, VO . . . −0.3 V to VDD + 0.3 V
Continuous output current, IO (VO = 0 to VDD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 mA to 25 mA
Continuous current through VDD or GND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −40 mA to 40 mA
Analog output current range, IO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25 mA to 25 mA
Maximum light exposure at 638 nm . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 mJ/cm2
Operating free-air temperature range, TA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25°C to 85°C
Storage temperature range, Tstg . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . −25°C to 85°C
Lead temperature 1,6 mm (1/16 inch) from case for 10 seconds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 260°C
† Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and
functional operation of the device at these or any other conditions beyond those indicated under “Recommended Operating Conditions” is not
implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
Recommended Operating Conditions (see Figure 1 and Figure 2)
MIN NOM MAX UNIT
Supply voltage, VDD
Input voltage, VI
High-level input voltage, VIH
Low-level input voltage, VIL
Wavelength of light source, λ
3
5 5.5
V
0
VDD
V
2
VDD
V
0 0.8 V
400
1000
nm
Clock frequency, fclock
5
8000
kHz
Sensor integration time, Parallel, tint (see Note 1)
0.03375
100 ms
Sensor integration time, Serial, tint (see Note 1)
0.04975
100 ms
Setup time, serial input, tsu(SI)
20 ns
Hold time, serial input, th(SI) (see Note 2)
0 ns
Operating free-air temperature, TA
0 70 °C
NOTES: 1. Integration time is calculated as follows:
tint(min) = (256 − 18) y clock period + 20 ms
where 256 is the number of pixels in series, 18 is the required logic setup clocks, and 20 ms is the pixel charge transfer time (tqt)
2. SI must go low before the rising edge of the next clock pulse.
Copyright E 2007, TAOS Inc.
4
r
www.taosinc.com
The LUMENOLOGY r Company
r
4페이지 TSL1402R
256 × 1 LINEAR SENSOR ARRAY WITH HOLD
TYPICAL CHARACTERISTICS
www.DTaAtOaSS0h4e1Fet−4AUP.cRoILm2007
PHOTODIODE SPECTRAL RESPONSIVITY
1
TA = 25°C
NORMALIZED IDLE SUPPLY CURRENT
vs
FREE-AIR TEMPERATURE
2
0.8
1.5
0.6
1
0.4
0.2 0.5
0
300 400 500 600 700 800 900 1000 1100
λ − Wavelength − nm
Figure 3
WHITE OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
2
VDD = 5 V
tint = 0.5 ms to 15 ms
1.5
0
0 10 20 30 40 50 60
TA − Free-Air Temperature − °C
Figure 4
DARK OUTPUT VOLTAGE
vs
FREE-AIR TEMPERATURE
0.10
VDD = 5 V
tint = 0.5 ms
tint = 1 ms
0.09
70
1 0.08
tint = 15 ms
tint = 5 ms
0.5
0.07
tint = 2.5 ms
0
0 10 20 30 40 50 60 70
TA − Free-Air Temperature − °C
Figure 5
0.06
0
10 20 30 40 50 60
TA − Free-Air Temperature − °C
Figure 6
70
The LUMENOLOGY r Company
r
www.taosinc.com
r
Copyright E 2007, TAOS Inc.
7
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부품번호 | 상세설명 및 기능 | 제조사 |
TSL1402R | 256 x 1 LINEAR SENSOR ARRAY WITH HOLD | TAOS |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |