|
|
PDF TSL1406R Data sheet ( Hoja de datos )
| Número de pieza | TSL1406R | |
| Descripción | 768 x 1 LINEAR SENSOR ARRAY WITH HOLD | |
| Fabricantes | TAOS | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de TSL1406R (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
t TSL1406R, TSL1406RS
768 × 1 LINEAR SENSOR ARRAY WITH HOLD
t www.TDAaOtSa0S4h2e–eAtU4GUU.cSoTm2002
D 768 × 1 Sensor-Element Organization
D 400 Dot-Per-Inch (DPI) Sensor Pitch
D High Linearity and Uniformity
D Wide Dynamic Range . . . 4000:1 (72 dB)
D Output Referenced to Ground
D Low Image Lag . . . 0.5% Typ
D Operation to 8 MHz
D Single 3-V to 5-V Supply
D Rail-to-Rail Output Swing (AO)
D No External Load Resistor Required
D Replacement for TSL1406
Description
The TSL1406R is a 400 dots-per-inch (DPI) linear
sensor array consisting of two 384-pixel sections,
each with its own output. The sections are aligned
to form a contiguous 768 × 1 pixel array. The
device incorporates a pixel data-hold function that
provides simultaneous integration-start and in-
tegration-stop times for all pixels.
TSL1406R
(TOP VIEW)
1 VPP
2 SI1
3 HOLD1
4 CLK1
5 GND
6 AO1
7 SO1
8 SI2
9 HOLD2
10 CLK2
11 SO2
12 AO2
13 VDD
Pixels measure 63.5 µm by 55.5 µm, with 63.5-µm center-to-center spacing and 8-µm spacing between pixels.
Operation is simplified by internal logic that requires only a serial-input (SI) pulse and a clock.
The device operates from a single 5-V power source. The two sections of 384 pixels each can be read out
separately or can be cascaded to provide a single output for all 768 pixels (see Figure 9).
The TSL1406RS is the same device mounted in a shorter package. These devices are intended for use in a
wide variety of applications including mark and code reading, OCR and contact imaging, edge detection and
positioning, and optical encoding.
Functional Block Diagram (each section)
Pixel 1 (385)
Integrator
Reset
_
+
Sample/
Output
Pixel
2
(386)
Pixel
3
(387)
Pixel
384
(768)
Analog
Bus
Output
Buffer
13
VDD
6, 12
AO
5
GND
Switch Control Logic
Hold
Q1
Q2 Q3
Q384(Q768)
Gain
Trim
7,11
SO
CLK 4,10
SI 2,8
Hold 3, 9
384-Bit Shift Register (2 each)
The LUMENOLOGYr Company
t
Texas Advanced Optoelectronic Solutions Inc.
800 Jupiter Road, Suite 205 S Plano, TX 75074 S (972t) 673-0759
www.taosinc.com
Copyright E 2002, TAOS Inc.
1
1 page  
TSL1406R, TSL1406RS
768 × 1 LINEAR SENSOR ARRAY WITH HOLD
www.TDAaOtSa0S4h2e–eAtU4GUU.cSoTm2002
Electrical Characteristics at fclock = 1 MHz, VDD = 5 V, TA = 25°C, λp = 640 nm, tint = 5 ms,
RL = 330 Ω, Ee = 12.5 µW/cm2 (unless otherwise noted) (see Note 2)
PARAMETER
TEST CONDITIONS
MIN TYP MAX UNIT
Vout
Vdrk
PRNU
Analog output voltage (white, average over 768 pixels)
Analog output voltage (dark, average over 256 pixels)
Pixel response nonuniformity
See Note 3
Ee = 0
See Note 4
1.6 2 2.4
0 0.1 0.3
±15%
V
V
Nonlinearity of analog output voltage
See Note 5
0.4%
FS
Output noise voltage
See Note 6
1 mVrms
Re Responsivity
See Note 7
V/
20 30 38 (µJ/cm2)
Vsat Analog output saturation voltage
SE Saturation exposure
DSNU Dark signal nonuniformity
IL Image lag
VDD = 5 V, RL = 330 Ω
VDD = 3 V, RL = 330 Ω
VDD = 5 V, See Note 8
VDD = 3 V, See Note 8
All pixels, Ee = 0, See Note 9
See Note 10
4.5 4.8
2.5 2.8
155
90
0.05
0.5%
V
nJ/cm2
0.15 V
IDD Supply current
IIH High-level input current
IIL Low-level input current
Ci Input capacitance, SI
VDD = 5 V, Ee = 0, RL = 330 Ω
VDD = 3 V, Ee = 0, RL = 330 Ω
VI = VDD
VI = 0
18 27
mA
16 25
10 µA
10 µA
15 pF
Ci Input capacitance, CLK
30 pF
NOTES: 2. All measurements made with a 0.1 µF capacitor connected between VDD and ground.
3. The array is uniformly illuminated with a diffused LED source having a peak wavelength of 640 nm.
4. PRNU is the maximum difference between the voltage from any single pixel and the average output voltage from all pixels of the
device under test when the array is uniformly illuminated.
5. Nonlinearity is defined as the maximum deviation from a best-fit straight line over the dark-to-white irradiance levels, as a percent
of analog output voltage (white).
6. RMS noise is the standard deviation of a single-pixel output under constant illumination as observed over a 5-second period.
7. Re(min) = [Vout(min) – Vdrk(max)] ÷ (Ee × tint)
8. SE(min) = [Vsat(min) – Vdrk(min)] × 〈Ee × tint) ÷ [Vout(max) – Vdrk(min)]
9. DSNU is the difference between the maximum and minimum output voltage for all pixels in the absence of illumination.
10. Image lag is a residual signal left in a pixel from a previous exposure. It is defined as a percent of white-level signal remaining after
a pixel is exposed to a white condition followed by a dark condition:
IL
+
Vout (IL) * Vdrk
Vout (white) * Vdrk
100
Timing Requirements (see Figure 1 and Figure 2)
tsu(SI) Setup time, serial input (see Note 11)
th(SI) Hold time, serial input (see Note 11 and Note 12)
tpd(SO) Propagation delay time, SO
tw Pulse duration, clock high or low
tr, tf Input transition (rise and fall) time
NOTES: 11. Input pulses have the following characteristics: tr = 6 ns, tf = 6 ns.
12. SI must go low before the rising edge of the next clock pulse.
MIN NOM MAX UNIT
20 ns
0 ns
50 ns
50 ns
0 500 ns
The LUMENOLOGYr Company
t
www.taosinc.com
t
Copyright E 2002, TAOS Inc.
5
5 Page 
TSL1406R, TSL1406RS
768 × 1 LINEAR SENSOR ARRAY WITH HOLD
www.TDAaOtSa0S4h2e–eAtU4GUU.cSoTm2002
PRODUCTION DATA — information in this document is current at publication date. Products conform to
specifications in accordance with the terms of Texas Advanced Optoelectronic Solutions, Inc. standard
warranty. Production processing does not necessarily include testing of all parameters.
NOTICE
Texas Advanced Optoelectronic Solutions, Inc. (TAOS) reserves the right to make changes to the products contained in this
document to improve performance or for any other purpose, or to discontinue them without notice. Customers are advised
to contact TAOS to obtain the latest product information before placing orders or designing TAOS products into systems.
TAOS assumes no responsibility for the use of any products or circuits described in this document or customer product
design, conveys no license, either expressed or implied, under any patent or other right, and makes no representation that
the circuits are free of patent infringement. TAOS further makes no claim as to the suitability of its products for any particular
purpose, nor does TAOS assume any liability arising out of the use of any product or circuit, and specifically disclaims any
and all liability, including without limitation consequential or incidental damages.
TEXAS ADVANCED OPTOELECTRONIC SOLUTIONS, INC. PRODUCTS ARE NOT DESIGNED OR INTENDED FOR
USE IN CRITICAL APPLICATIONS IN WHICH THE FAILURE OR MALFUNCTION OF THE TAOS PRODUCT MAY
RESULT IN PERSONAL INJURY OR DEATH. USE OF TAOS PRODUCTS IN LIFE SUPPORT SYSTEMS IS EXPRESSLY
UNAUTHORIZED AND ANY SUCH USE BY A CUSTOMER IS COMPLETELY AT THE CUSTOMER’S RISK.
LUMENOLOGY is a registered trademark, and TAOS, the TAOS logo, and Texas Advanced Optoelectronic Solutions are trademarks of
Texas Advanced Optoelectronic Solutions Incorporated.
The LUMENOLOGYr Company
t
www.taosinc.com
t
Copyright E 2002, TAOS Inc.
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet TSL1406R.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| TSL1406R | 768 x 1 LINEAR SENSOR ARRAY WITH HOLD | TAOS |
| TSL1406RS | 768 x 1 LINEAR SENSOR ARRAY WITH HOLD | TAOS |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |