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부품번호 | PMWD26UN 기능 |
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기능 | Dual N-channel uTrenchMOS ultra low level FET | ||
제조업체 | NXP Semiconductors | ||
로고 | |||
전체 12 페이지수
PMWD26UN
www.DataSheet4U.com
Dual N-channel µTrenchMOS ultra low level FET
Rev. 02 — 19 May 2005
Product data sheet
1. Product profile
1.1 General description
Dual N-channel enhancement mode Field-Effect Transistor (FET) in a plastic package
using TrenchMOS technology.
1.2 Features
s Surface-mounted package
s Very low threshold voltage
s Low profile
s Fast switching
1.3 Applications
s Portable appliances
s Battery management
s PCMCIA cards
s Load switching
1.4 Quick reference data
s VDS ≤ 20 V
s Ptot ≤ 3.1 W
s ID ≤ 7.8 A
s RDSon ≤ 30 mΩ
2. Pinning information
Table 1: Pinning
Pin Description
1 drain1 (D1)
2, 3 source1 (S1)
4 gate1 (G1)
5 gate2 (G2)
6, 7 source2 (S2)
8 drain2 (D2)
Simplified outline
85
Symbol
D1
D2
14
SOT530-1 ((TSSOP8)
S1 G1 S2 G2
msd901
Philips Semiconductors
PMWD26UNwww.DataSheet4U.com
Dual N-channel µTrenchMOS ultra low level FET
5. Thermal characteristics
Table 4: Thermal characteristics
Symbol Parameter
Rth(j-sp) thermal resistance from junction to solder point
Rth(j-a) thermal resistance from junction to ambient
Conditions
Figure 4
mounted on a printed-circuit
board; minimum footprint;
vertical in still air
Min Typ Max Unit
- - 40 K/W
- 100 - K/W
102
Zth(j-sp)
(K/W)
δ = 0.5
10 0.2
0.1
0.05
0.02
1
single pulse
10-1
10-4
10-3
10-2
10-1
1
003aaa267
P δ = tp
T
tp
T
10 tp (s)
t
102
Fig 4. Transient thermal impedance from junction to solder point as a function of pulse duration
9397 750 14982
Product data sheet
Rev. 02 — 19 May 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
4 of 12
4페이지 Philips Semiconductors
PMWD26UNwww.DataSheet4U.com
Dual N-channel µTrenchMOS ultra low level FET
1.2
VGS(th)
(V)
0.9
0.6
0.3
max
typ
min
03aj65
10−3
ID
(A)
10−4
10−5
03aj64
min typ max
0
-60 0
60 120 180
Tj (°C)
ID = 1 mA; VDS = VGS
Fig 9. Gate-source threshold voltage as a function of
junction temperature
10−6
0
0.2 0.4 0.6 0.8
1
VGS (V)
Tj = 25 °C; VDS = 5 V
Fig 10. Sub-threshold drain current as a function of
gate-source voltage
104
C
(pF)
003aaa271
8
IS
(A)
6
003aaa272
Ciss
150 °C
Tj = 25 °C
103 4
102
10-1
1
Coss
Crss
10 102
VDS (V)
2
0
0 0.2 0.4 0.6 0.8 1
VSD (V)
VGS = 0 V; f = 1 MHz
Fig 11. Input, output and reverse transfer capacitances
as a function of drain-source voltage; typical
values
Tj = 25 °C and 150 °C; VGS = 0 V
Fig 12. Source (diode forward) current as a function of
source-drain (diode forward) voltage; typical
values
9397 750 14982
Product data sheet
Rev. 02 — 19 May 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
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부품번호 | 상세설명 및 기능 | 제조사 |
PMWD26UN | Dual N-channel uTrenchMOS ultra low level FET | NXP Semiconductors |
DataSheet.kr | 2020 | 연락처 | 링크모음 | 검색 | 사이트맵 |