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MX25L3205A 데이터시트 PDF




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부품번호 MX25L3205A 기능
기능 32M-BIT [x 1] CMOS SERIAL eLiteFlash MEMORY
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MX25L3205A 데이터시트, 핀배열, 회로
MX25L3205Awww.DataSheet4U.com
Macronix NBitTM Memory Family
32M-BIT [x 1] CMOS SERIAL eLiteFlashTM MEMORY
FEATURES
GENERAL
• Serial Peripheral Interface (SPI) compatible -- Mode 0
and Mode 3
• 33,554,432 x 1 bit structure
• 64 Equal Sectors with 64K byte each
- Any sector can be erased
• Single Power Supply Operation
- 2.7 to 3.6 volt for read, erase, and program operations
• Latch-up protected to 100mA from -1V to Vcc +1V
• Low Vcc write inhibit is from 1.5V to 2.5V
PERFORMANCE
• High Performance
- Fast access time: 50MHz serial clock (30pF + 1TTL
Load)
- Fast program time: 3ms/page (typical, 256-byte per
page)
- Fast erase time: 1s/sector (typical, 64K-byte per
sector) and 64s/chip (typical)
- Acceleration mode:
- Program time: 2.4ms/page (typical)
- Erase time: 0.8s/sector (typical) and 51s/chip
(typical)
• Low Power Consumption
- Low active read current: 30mA (max.) at 50MHz
- Low active programming current: 30mA (max.)
- Low active erase current: 38mA (max.)
- Low standby current: 50uA (max.)
- Deep power-down mode 1uA (typical)
• Minimum 10K erase/program cycle for array
• Minimum 100K erase/program cycle for additional 4Kb
SOFTWARE FEATURES
• Input Data Format
- 1-byte Command code
• Auto Erase and Auto Program Algorithm
- Automatically erases and verifies data at selected
sector
- Automatically programs and verifies data at selected
page by an internal algorithm that automatically times
the program pulse widths (Any page to be programed
should have page in the erased state first)
Status Register Feature
Electronic Identification
- JEDEC 2-byte Device ID
- RES command, 1-byte Device ID
- REMS command, ADD=00H will output the
manufacturer's ID first and ADD=01H will output device
ID first
Additional 4Kb sector independent from main memory
for parameter storage to eliminate EEPROM from
system
HARDWARE FEATURES
SCLK Input
- Serial clock input
• SI Input
- Serial Data Input
• SO/PO7
- Serial Data Output or Parallel mode Data output/input
• WP#/ACC Pin
- Hardware write protection and Program/erase accel-
eration
• HOLD# pin
- pause the chip without disselecting the chip (not for
parallel mode, please connect HOLD# pin to VCC dur-
ing parallel mode)
• PO0~PO6
- for parallel mode data output/input
• PACKAGE
- 16-pin SOP (300mil)
- 8-land SON (8x6mm)
- All Pb-free devices are RoHS Compliant
P/N: PM1243
REV. 1.2, NOV. 06, 2006
1




MX25L3205A pdf, 반도체, 판매, 대치품
MX25L3205Awww.DataSheet4U.com
DATA PROTECTION
The MX25L3205A are designed to offer protection against
accidental erasure or programming caused by spurious
system level signals that may exist during power
transition. During power up the device automatically resets
the state machine in the Read mode. In addition, with its
control register architecture, alteration of the memory
contents only occurs after successful completion of
specific command sequences. The device also
incorporates several features to prevent inadvertent write
cycles resulting from VCC power-up and power-down
transition or system noise.
Power-on reset and tPUW: to avoid sudden power
switch by system power supply transition, the power-
on reset and tPUW (internal timer) may protect the
Flash.
Valid command length checking: The command length
will be checked whether it is at byte base and com-
pleted on byte boundary.
Write Enable (WREN) command: WREN command is
required to set the Write Enable Latch bit (WEL) before
other command to change data. The WEL bit will return
to reset stage under following situation:
- Power-up
- Write Disable (WRDI) command completion
- Write Status Register (WRSR) command completion
- Page Program (PP) command completion
- Sector Erase (SE) command completion
- Block Erase (BE) command completion
- Chip Erase (CE) command completion
Software Protection Mode (SPM): by using BP0-BP2
bits to set the part of Flash protected from data change.
Hardware Protection Mode (HPM): by using WP# going
low to protect the BP0-BP2 bits and SRWD bit from
data change.
Deep Power Down Mode: By entering deep power down
mode, the flash device also is under protected from
writing all commands except Release from deep power
down mode command (RDP) and Read Electronic
Signature command (RES).
P/N: PM1243
REV. 1.2, NOV. 06, 2006
4

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MX25L3205A 전자부품, 판매, 대치품
MX25L3205Awww.DataSheet4U.com
Table 2. COMMAND DEFINITION
COMMAND WREN
(byte)
(write
Enable)
1st 06 Hex
2nd
3rd
4th
5th
Action
sets the
(WEL)
write
enable
latch bit
WRDI
(write
disable)
04 Hex
reset the
(WEL)
write
enable
latch bit
RDID
(read ident-
ification)
9F Hex
RDSR
(read status
register)
05 Hex
output the to read out
manufacturer the status
ID and 2-byte register
device ID
WRSR
READ
Fast Read
(write status (read data) (fast read
register)
data)
01 Hex
03 Hex 0B Hex
AD1 AD1
AD2 AD2
AD3 AD3
x
to write new n bytes
values to the read out
status register until
CS# goes
high
Parallel
Mode
55 Hex
Enter and
stay in
Parallel
Mode until
power off
COMMAND SE
(byte)
(Sector
Erase)
1st
2nd
3rd
4th
5th
Action
20 or
D8 Hex
AD1
AD2
AD3
CE PP
DP EN4K
(Chip (Page (Deep (Enter
Erase) Program) Power 4Kb
Down) sector)
60 or 02 Hex B9 Hex A5 Hex
C7 Hex
AD1
AD2
AD3
EX4K
(Exit
4Kb
sector)
B5 Hex
RDP
RES(Read
(Release Electronic
from Deep ID)
Power-down)
AB Hex
AB Hex
x
x
x
Enter Exit
the the
additional additional
4Kb 4Kb
sector sector
REMS (Read
Electronic
Manufacturer
& Device ID)
90 Hex
x
x
ADD (1)
Output the
manufacturer
ID and device
ID
(1) ADD=00H will output the manufacturer's ID first and ADD=01H will output device ID first.
(2) It is not recommended to adopt any other code which is not in the above command definition table.
P/N: PM1243
REV. 1.2, NOV. 06, 2006
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관련 데이터시트

부품번호상세설명 및 기능제조사
MX25L3205

32M-BIT [x 1] CMOS SERIAL eLiteFlashTM MEMORY

Macronix International
Macronix International
MX25L3205A

32M-BIT [x 1] CMOS SERIAL eLiteFlash MEMORY

Macronix International
Macronix International

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