PDF CS4270 Data sheet ( Hoja de datos )

Número de pieza	CS4270
Descripción	192 kHz Stereo Audio CODEC
Fabricantes	Cirrus Logic
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CS4270 24-Bit, 192-kHz Stereo Audio CODEC D/A Features  High Performance – 105 dB Dynamic Range – -87 dB THD+N  Selectable Serial Audio Interface Formats – Left-Justified up to 24 bits – I²S up to 24 bits – Right-Justified 16, and 24 bits  Control Output for External Muting  Digital De-Emphasis  Popguard® Technology  Multi-bit  Conversion  Digital Volume Control  Single-Ended Output A/D Features  High Performance – 105 dB Dynamic Range – -95 dB THD+N  Multi-bit Conversion  High-Pass Filter to Remove DC Offsets  Selectable Serial Audio Interface Formats – Left-Justified up to 24 bits – I²S up to 24 bits  Single-Ended Input System Features  Direct Interface with Logic Levels 1.8 V to 5 V  Internal Digital Loopback  Stand-Alone or Serial Control Port Functionality  Single-Ended Analog Architecture  Supports all Audio Sample Rates from 4 kHz to 216 kHz  3.3- or 5-V Core Supply VLC 1.8 V to 5 V VD 3.3 V to 5 V VA 3.3 V to 5 V Software or Stand-Alone Configuration ____ RST PCM Serial Audio Input PCM Serial Audio Output Level Translators Configuration Registers Serial Audio Input Serial Audio Output Volume Control Volume Control DAC Digital Filter DAC Digital Filter High Pass Filter High Pass Filter Multi-bit Modulator Multi-bit Modulator ADC Digital Filter ADC Digital Filter Internal Voltage Reference External Mute Control Switch -Cap DAC and Analog Filter Switch -Cap DAC and Analog Filter Switch-Cap ADC Switch-Cap ADC Mute Signals Analog Out A (Left) Analog Out B (Right) Analog Input A (Left) Analog Input B (Right) http://www.cirrus.com Copyright  Cirrus Logic, Inc. 2010 (All Rights Reserved) AUGUST '10 DS686F1 1 page 1.2 Stand-Alone Mode SDIN LRCK MCLK SCLK VD DGND SDOUT VLC M1 M0 I²S/LJ MDIV1 1 2 3 4 5 6 7 8 9 10 11 12 24 MUTEB 23 AOUTB 22 AOUTA 21 MUTEA 20 AGND 19 VA 18 FILT+ 17 VQ 16 AINB 15 AINA 14 RST 13 MDIV2 CS4270 Pin Name SDIN LRCK MCLK SCLK VD DGND SDOUT (M/S) VLC M1 M0 I²S/LJ MDIV1 MDIV2 RST AINA AINB VQ FILT+ VA AGND MUTEA MUTEB AOUTA AOUTB # Pin Description 1 Serial Audio Data Input (Input) - Input for two’s complement serial audio data. 2 Left Right Clock (Input/Output) - Determines which channel, Left or Right, is currently active on the serialaudio data line. The frequency of the left/right clock must be at the audio sample rate, Fs. 3 Master Clock (Input) - Clock source for the delta-sigma modulator and digital filters. 4 Serial Bit Clock (Input/Output) - Serial bit clock for the serial audio interface. 5 Digital Power (Input) - Positive power for the digital section. 6 Digital Ground (Input) - Ground reference for the digital section. 7 Serial Audio Data Output (Output) - Output for two’s complement serial audio data. This pin must be pulled up or down through a 47-k resistor to select Master or Slave Mode. 8 Serial Control Port Power (Input) - Positive power for the Serial Control Port. 9 10 Mode Selection (Input) - Determines the system sampling frequency range of the device. 11 Serial Audio Interface Select (Input) - Selects either the Left-Justified or I²S format for the Serial Audio Interface. 12 13 MCLK Divide (Input) - Configures the device to divide MCLK by 1, 1.5, 2, or 4. 14 Reset (Input) - Input for resetting all internal registers to their default settings and for placing the device in a low-power mode. 15 16 Analog Input (Input) - Analog inputs to the ADC. 17 Quiescent Voltage (Output) - Filter connection for the internal quiescent voltage 18 Positive Voltage Reference (Output) - Positive reference voltage for the internal sampling circuits. 19 Analog Power (Input) - Positive power for the analog section. 20 Analog Ground (Input) - Ground reference for the analog section. 21 Mute Control (Output) - Mute control signal used to control the state of the optional external analog mut- 24 ing circuitry. See Section 5.6 on page 27. 22 23 Analog Audio Output (Output) - Analog outputs for the DAC. DS686F1 5 5 Page CS4270 ADC ANALOG CHARACTERISTICS Test Conditions (unless otherwise specified): VD = VL = 3.3 V, DGND = AGND = 0 V; TA = 25° C; 997 Hz Input Sine Wave. Figure 15 on page 26 shows the test circuit; Fs = 48/96/192 kHz; Synchronous Mode; Measurement Bandwidth 10 Hz to 20 kHz. Dynamic Performance VA = 5 V VA = 3.3 V Single-Speed Mode Fs = 48 kHz Symbol Min Typ Max Min Typ Max Unit Dynamic Range Total Harmonic Distortion + Noise A-weighted unweighted 99 105 96 102 - - 96 102 93 99 - - (Note 8) -1 dB -20 dB THD+N - - -95 -90 -82 - - - -92 -87 -79 - -60 dB - -42 - - -39 - dB dB dB dB dB Double-Speed Mode Fs = 96 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 99 105 96 102 - 99 - - - 96 102 93 99 - 96 - - - Total Harmonic Distortion + Noise (Note 8) -1 dB - -95 -90 - -92 -87 -20 dB THD+N - -82 - - -79 - -60 dB - -42 - - -39 - 40 kHz bandwidth unweighted - -93 - - -89 - Quad-Speed Mode Fs = 192 kHz Dynamic Range A-weighted unweighted 40 kHz bandwidth unweighted 99 105 96 102 - 99 - - - 96 102 93 99 - 96 - - - dB dB dB dB dB dB dB dB dB dB Total Harmonic Distortion + Noise (Note 8) -1 dB - -95 -90 - -92 -87 -20 dB THD+N - -82 - - -79 - -60 dB - -42 - - -39 - 40 kHz bandwidth -1 dB - -93 - - -89 - Dynamic Performance - All Sampling Speed Modes dB dB dB dB Parameter Min Typ Max Unit Interchannel Isolation DC Accuracy Interchannel Gain Mismatch Gain Error Gain Drift Analog Input Characteristics Full-Scale Input Voltage Input Impedance - - -3 - 0.53VA - 100 0.1 - 100 0.56VA 300 - - +3 - 0.58*VA - dB dB % ppm/°C Vpp k Note: 8. Referred to the typical full-scale input voltage. DS686F1 11 11 Page

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