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PDF LP3958 Data sheet ( Hoja de datos )
| Número de pieza | LP3958 | |
| Descripción | Lighting Management Unit | |
| Fabricantes | National Semiconductor | |
| Logotipo |  |
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February 2006
www.DataSheet4U.com
LP3958
Lighting Management Unit with High Voltage Boost
Converter
General Description
LP3958 is a Lighting Management Unit for portable applica-
tions. It is used to drive display backlight and keypad LEDs.
The device can drive 5 separately connected strings of LEDs
with high voltage boost converter.
The keypad LED driver allows driving LEDs from high volt-
age boost converter or separate supply voltage.The MAIN
and SUB outputs are high resolution current mode drivers.
Keypad LED outputs can be used in switch mode and cur-
rent mode. External PWM control can be used for any se-
lected outputs.
The device is controlled through 2-wire low voltage I2C
compatible interface that reduces the number of required
connections.
LP3958 is offered in a tiny 25-bump micro-SMD package.
Features
n High efficiency boost converter with programmable
output voltage
n 2 individual drivers for serial display backlight LEDs
n 3 drivers for serial keypad LEDs
n Automatic dimming controller
n Stand alone serial keypad LEDs controller
n 3 general purpose IO pins
n 25-bump micro SMD Package: (2.54mm x 2.54mm x
0.6mm)
Applications
n Cellular Phones and PDAs
n MP3 Players
n Digital Cameras
Typical Application
© 2006 National Semiconductor Corporation DS201755
20175570
www.national.com
1 page  
Electrical Characteristics (Notes 2, 8)
Limits in standard typeface are for TJ = 25o C. Limits in boldface type apply over the operating ambient tempewrwatwur.eDaratangSheeet4U.com
(-30oC < TA < +85oC). Unless otherwise noted, specifications apply to the LP3958 Block Diagram with: VDD1,2 = 3.0 ... 5.5V,
CVDD = CVDDIO = 100nF, COUT = 2 x 4.7µF, CIN = 10µF, CVDDA = 1µF, CVREF = 100nF, L1 = 10µH, RKEY = 8.2kΩ and RRT =
82kΩ (Note 9).
Symbol
Parameter
Condition
Min Typ Max Units
IVDD
Standby supply current
(VDD1, VDD2)
No-boost supply current
(VDD1, VDD2)
No-load supply current
(VDD1, VDD2)
NSTBY = L
Register 0DH=08H (Note 10)
NSTBY = H,
EN_BOOST = L
NSTBY = H,
EN_BOOST = H
Autoload OFF
1.7 7
300 800
750 1300
µA
µA
uA
VDDA
Output voltage of internal LDO
IVDDA = 1mA
2.80
-3
+3
V
%
VREF
Reference voltage (Note 11)
1.23
V
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pins.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ=150oC (typ.) and disengages at
TJ=130oC (typ.).
Note 4: For detailed soldering specifications and information, please refer to National Semiconductor Application Note AN1112 : Micro SMD Wafer Level Chip Scale
Package
Note 5: The Human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. The machine model is a 200pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 6: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125oC), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA x PD-MAX).
Note 7: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 8: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 9: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 10: Boost output voltage set to 8V (08H in register 0DH) to prevent any unneccessary current consumption.
Note 11: No external loading allowed for VREF pin.
5 www.national.com
5 Page 
Boost Converter Typical Performance Characteristics (Continued)
www.DataSheet4U.com
Boost Load Transient Response 25mA – 70mA
Autoload Effect on Input Current, No Load
20175585
Boost Maximum Current vs. Output Voltage
20175595
20175586
11 www.national.com
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet LP3958.PDF ] | |
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