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PDF H55S1262EFP-75E Data sheet ( Hoja de datos )
| Número de pieza | H55S1262EFP-75E | |
| Descripción | 128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O | |
| Fabricantes | Hynix Semiconductor | |
| Logotipo |  |
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128MBit MOBILE SDR SDRAMs based on 2M x 4Bank x16 I/O
Specification of
128M (8Mx16bit) Mobile SDRAM
Memory Cell Array
- Organized as 4banks of 2,097,152 x16
This document is a general product description and is subject to change without notice. Hynix does not assume any responsibility for
use of circuits described. No patent licenses are implied.
Rev 1.2 /Aug. 2009
1
1 page  
11
128Mbit (8Mx16bit) MobilewwSwD.DRataMSheemet4oUr.cyom
H55S1262EFP Series
FEATURES
● Standard SDRAM Protocol
● Clock Synchronization Operation
- All the commands registered on positive edge of basic input clock (CLK)
● MULTIBANK OPERATION - Internal 4bank operation
- During burst Read or Write operation, burst Read or Write for a different bank is performed.
- During burst Read or Write operation, a different bank is activated and burst Read or Write
for that bank is performed
- During auto precharge burst Read or Write, burst Read or Write for a different bank is performed
● Power Supply Voltage : VDD / VDDQ = 1.7V to 1.95V
● LVCMOS compatible I/O Interface
● Low Voltage interface to reduce I/O power
● Programmable burst length: 1, 2, 4, 8 or full page
● Programmable Burst Type : sequential or interleaved
● Programmable CAS latency of 3 or 2
● Programmable Drive Strength
● Low Power Features
- Programmable PASR(Partial Array Self Refresh)
- Auto TCSR (Temperature Compensated Self Refresh)
- Programmable DS (Drive Strength)
- Deep Power Down Mode
● -25oC ~ 85oC or -30oC ~ 85oC Operation Temperature
- Extended Temp. : -25oC ~ 85oC
- Mobile Temp. : -30oC ~ 85oC
● Package Type : 54Ball FBGA
Rev 1.2 /Aug. 2009
5
5 Page 
11
128Mbit (8Mx16bit) MobilewwSwD.DRataMSheemet4oUr.cyom
H55S1262EFP Series
DC CHARACTERISTICS II (TC= -25 to 85oC4) or -30 to 85oC 4), VDD = 1.7V min to 1.95V max, VSS = 0V)
Parameter
Symbol
Test Condition
Speed
Unit Note
166MHz 133MHz
Operating Current
IDD1
Burst length=1, One bank active
tRC ≥ tRC(min), IOL=0mA
45 40 mA 1
Precharge Standby Current IDD2P
in Power Down Mode
IDD2PS
CKE ≤ VIL(max), tCK = min
CKE ≤ VIL(max), tCK = ∞
0.3 mA
0.3 mA
IDD2N
Precharge Standby Current
in Non Power Down Mode
IDD2NS
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = min
Input signals are changed one time during
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
5
3
mA
Active Standby Current
in Power Down Mode
IDD3P
IDD3PS
CKE ≤ VIL(max), tCK = min
CKE ≤ VIL(max), tCK = ∞
2
mA
1.2
IDD3N
Active Standby Current
in Non Power Down Mode
IDD3NS
CKE ≥ VIH(min), CS ≥ VIH(min), tCK = min
Input signals are changed one time during
2clks.
All other pins ≥ VDD-0.2V or ≤ 0.2V
CKE ≥ VIH(min), tCK = ∞
Input signals are stable.
10
5
mA
Burst Mode Operating
Current
IDD4
tCK ≥ tCK(min), IOL=0mA
All banks active
55 50 mA 1
Auto Refresh Current
IDD5
tRFC ≥ tRFC(min),
80 mA
Self Refresh Current
IDD6
CKE ≤ 0.2V
See Next Page uA 2
Standby Current in
Deep Power Down Mode
IDD7
See p.49~50
10 uA 3
Note :
1. IDD1 and IDD4 depend on output loading and cycle rates. Specified values are measured with the output open
2. See the tables of next page for more specific IDD6 current values.
3. Please contact Hynix office for more information and ability for DPD operation. Deep Power Down operation is a hynix optional
function.
4. - Extended Temp. : -25oC ~ 85oC
- Mobile Temp. : -30oC ~ 85oC
Rev 1.2 /Aug. 2009
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet H55S1262EFP-75E.PDF ] | |
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