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PDF PIP212-12M Data sheet ( Hoja de datos )
| Número de pieza | PIP212-12M | |
| Descripción | DC-to-DC converter powertrain | |
| Fabricantes | NXP Semiconductors | |
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PIP212-12M
DC-to-DC converter powertrain
Rev. 02 — 2 March 2005
Preliminary data sheet
1. General description
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2. Features
The PIP212M-12M is a fully optimized powertrain for high current high frequency
synchronous buck DC-to-DC applications. The PIP212M-12M replaces two power
MOSFETs, a Schottky diode and a driver IC, resulting in a significant increase in power
density. The integrated solution allows for optimization of individual components and
greatly reduces the parasitics associated with conventional discrete solutions, resulting in
higher system efficiencies at higher frequency operation.
s Input conversion range from 3.3 V to 16 V
s Output voltages from 0.8 V to 6 V
s Capable of up to 30 A maximum output current
s Operating frequency up to 1 MHz
s Peak system efficiency > 90 % at 500 kHz
s Automatic Dead-time Reduction (ADR) for maximum efficiency
s Internal thermal shutdown
s Auxiliary 5 V output
s Power ready output flag
s Power sequencing functions
s Fault flag for lost phase detection
s Internal 6.5 V regulator for efficient gate drive
s Compatible with single and multi-phase PWM controllers
s Internal boost switch for high efficiency and low noise
s Low-profile, surface-mounted package (8 mm × 8 mm × 0.85 mm)
3. Applications
s High-current DC-to-DC point-of-load converters
s Small form-factor voltage regulator modules
s Microprocessor and memory voltage regulators
s Intel® compatible VRM (VRM9 and VRM10)
s Intel® Driver MOS (DrMOS) compatible
1 page  
Philips Semiconductors
PIP212-12M
DC-to-DC converter powertrain
7.3 Boost switch
The gate drive to the upper MOSFET is provided by a bootstrap capacitor (typically
100 nF) that is placed between the CBP and CBN pins. This capacitor is charged via an
internal boost switch to a voltage within a few millivolts of VDDC up to a maximum of 12 V
(this is to prevent excessive gate charge losses when VDDC > 12 V). The upper MOSFET
will be switched according to PWM input once the boost capacitor voltage is above 4.3 V.
When ever the voltage is below 2.7 V, the upper MOSFET will remain off.
7.4
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VDDG regulator
The gate drive to the lower MOSFET is provided by the VDDG pin. A 1 µF capacitor should
be connected between this pin and VSSC. For minimum power loss within the
PIP212-12M, an external power supply of between 5 V and 12 V should be connected to
this pin. The optimum value for this voltage is dependent on the application but in the
majority of cases a 5 V supply is recommended; see Figure 11. In cases where the VDDG
maximum voltage will not be exceeded, the VDDG capacitor can be omitted by connecting
the VDDG and VDDC pins; see Figure 13.
When VDDC is connected to a supply greater than 9 V, an internal 6.5 V regulator
connected to VDDG can be used to provide the gate drive for the lower MOSFET;
see Figure 12. The VDDG regulator is enabled by leaving the VDDG_EN pin open resulting
in this pin being pulled internally to 5 V. If an external supply is to be connected to VDDG
then the VDDG_EN pin must be connected to VSSC to disable the internal VDDG regulator.
Table 3: VDDG biasing
VDDG_EN
VDDG
Open circuit
internal 6.5 V regulator used (VDDC > 9 V)
VSSC
connection to external supply required
7.5 3-state function
If the input to VI from the PWM controller becomes high impedance, then the VI input is
driven to 2.5 V by an internal voltage divider. A voltage on the VI pin that is in-between the
VIH and VIL levels and present for longer than td(3-state), causes both MOSFETs to be
turned off. Normal operation commences once the VI input is outside this window for
longer than td(3-state).
7.6 Automatic Dead-time Reduction (ADR)
Protection against cross-conduction (shoot-through) is achieved via the insertion of a
delay (or dead-time) between the switching off of one MOSFET and the switching on of
the other MOSFET. The automatic dead-time reduction feature continuously monitors the
body diode of the lower MOSFET adjusting the dead-time to minimize body diode
conduction. This reduces power loss in both the upper and lower MOSFETs due to the
reduction in body diode conduction and reverse recovery charge. The lower power
dissipation leads to higher system efficiency and enables higher frequency operation.
9397 750 14586
Preliminary data sheet
Rev. 02 — 2 March 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
5 of 21
5 Page 
Philips Semiconductors
PIP212-12M
DC-to-DC converter powertrain
11. Application information
11.1 Typical application
conversion supply
control circuit supply
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10 Ω
1 µF
100 nF
1 µF
VDDG VDDC VDDO
REG5V
CBP
VI PIP212-12M CBN
DISABLE
VO
VSSC
VSSO
22 µF
(4×)
100 nF
360 nH
100 µF
(2×)
PWM
CONTROLLER
VCC
PWM 1
PWM 1
PWM 1
PWM 1
10 Ω
1 µF
1 µF
VDDG VDDC VDDO
REG5V
CBP
VI PIP212-12M CBN
DISABLE
VO
VSSC
VSSO
22 µF
(4×)
100 nF
360 nH
100 µF
(2×)
10 Ω
1 µF
1 µF
VDDG VDDC VDDO
REG5V
CBP
VI PIP212-12M CBN
DISABLE
VO
VSSC
VSSO
22 µF
(4×)
100 nF
360 nH
100 µF
(2×)
signal ground
power ground
10 Ω
1 µF
1 µF
VDDG VDDC VDDO
REG5V
CBP
VI PIP212-12M CBN
DISABLE
VO
VSSC
VSSO
22 µF
(4×)
100 nF
360 nH
100 µF
(2×)
voltage
output
03ao41
Fig 10. Typical application circuit using the PIP212-12M in a four-phase converter
A typical four-phase buck converter is shown in Figure 10. This system uses four
PIP212-12M devices to deliver a continuous output current of 120 A at an operating
frequency of 500 kHz.
9397 750 14586
Preliminary data sheet
Rev. 02 — 2 March 2005
© Koninklijke Philips Electronics N.V. 2005. All rights reserved.
11 of 21
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