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ADC0804S040 데이터시트 PDF




NXP Semiconductors에서 제조한 전자 부품 ADC0804S040은 전자 산업 및 응용 분야에서
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부품번호 ADC0804S040 기능
기능 (ADC0804S030 - ADC0804S050) Single 8 bits ADC
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ADC0804S040 데이터시트, 핀배열, 회로
ADC0804S030/040/050
www.DataSheet4U.com
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Rev. 02 — 14 August 2008
Product data sheet
1. General description
The ADC0806030/040/050 are a family of 8-bit high-speed, low-power Analog-to-Digital
Converters (ADC) for professional video and other applications. It converts the analog
input signal into 8-bit binary coded digital signals at a maximum sampling rate of 50 MHz.
All digital inputs and outputs are Transistor-Transistor Logic (TTL) and CMOS compatible,
although a low-level sine wave clock input signal can also be used.
The device requires an external source to drive its reference ladder. If the application
requires that the reference is driven via internal sources, NXP recommends you use one
of the ADC1003S030/040/050 family.
2. Features
I 8-bit resolution
I Sampling rate up to 50 MHz
I DC sampling allowed
I One clock cycle conversion only
I High signal-to-noise ratio over a large analog input frequency range (7.8 effective bits
at 4.43 MHz full-scale input at fclk = 40 MHz)
I No missing codes guaranteed
I In-Range (IR) CMOS output
I TTL and CMOS levels compatible digital inputs
I 3 V to 5 V CMOS digital outputs
I Low-level AC clock input signal allowed
I External reference voltage regulator
I Power dissipation only 175 mW (typical)
I Low analog input capacitance, no buffer amplifier required
I No sample-and-hold circuit required
3. Applications
I Video data digitizing
I Radar
I Transient signal analysis
I Σ∆ modulators
I Medical imaging
I Barcode scanner
I Global Positioning System (GPS) receiver




ADC0804S040 pdf, 반도체, 판매, 대치품
NXP Semiconductors
7. Pinning information
7.1 Pinning
ADC0804S030/040/050
www.DataSheet4U.com
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
CLK 1
TC 2
VCCA 3
AGND 4
n.c. 5
RB 6
RM 7
VI 8
RT 9
OE 10
VCCD2 11
DGND2 12
VCCO 13
OGND 14
Fig 2. Pin configuration
ADC0804S
030TS
28 VCCD1
27 DGND1
26 IR
25 D7
24 D6
23 D5
22 D4
21 D3
20 D2
19 D1
18 D0
17 n.c.
16 n.c.
15 n.c.
014aaa551
7.2 Pin description
Table 3.
Symbol
CLK
TC
VCCA
AGND
n.c.
RB
RM
VI
RT
OE
VCCD2
DGND2
VCCO
OGND
n.c.
n.c.
n.c.
D0
D1
Pin description
Pin
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
Description
clock input
two’s complement input (active LOW)
analog supply voltage (5 V)
analog ground
not connected
reference voltage BOTTOM input
reference voltage MIDDLE
analog input voltage
reference voltage TOP input
output enable input (CMOS level input, active LOW)
digital supply voltage 2 (5 V)
digital ground 2
supply voltage for output stages (3 V to 5 V)
output ground
not connected
not connected
not connected
data output; bit 0 (Least Significant Bit (LSB))
data output; bit 1
ADC0804S030_040_050_2
Product data sheet
Rev. 02 — 14 August 2008
© NXP B.V. 2008. All rights reserved.
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ADC0804S040 전자부품, 판매, 대치품
NXP Semiconductors
ADC0804S030/040/050
www.DataSheet4U.com
Single 8 bits ADC, up to 30 MHz, 40 MHz or 50 MHz
Table 6. Characteristics
VCCA = V3 to V4 = 4.75 V to 5.25 V; VCCD = V11 to V12 and V28 to V27 = 4.75 V to 5.25 V;
VCCO = V13 to V14 = 3.0 V to 5.25 V; AGND and DGND shorted together; Tamb = 0 °C to 70 °C; typical values measured at
VCCA = VCCD = 5 V and VCCO = 3.3 V, Vi(a)(p-p) = 2.0 V; CL = 15 pF and Tamb = 25 °C; unless otherwise specified.
Symbol
Parameter
Conditions
Min
Typ Max
Unit
Vref(dif)
differential reference
voltage
VRT VRB
2.0
2.37 3.0
V
Iref
Rlad
TCRlad
reference current
ladder resistance
ladder resistor
temperature coefficient
VRT VRB = 2.37 V
-
-
-
9.7 -
245 -
456 -
mA
m/K
Voffset
Vi(a)(p-p)
offset voltage
peak-to-peak analog
input voltage
BOTTOM;
VRT VRB = 2.37 V
TOP; VRT VRB = 2.37 V
[2] -
[2] -
[3] 1.7
175 -
175 -
2.02 2.55
mV
mV
V
Digital outputs D7 to D0 and IR (referenced to OGND)
VOL
LOW-level output
IOL = 1 mA
voltage
0 - 0.5 V
VOH
HIGH-level output
IOH = 1 mA
voltage
VCCO 0.5 -
VCCO
V
Io
output current
in 3-state mode;
0.5 V < VO < VCCO
Switching characteristics; Clock input CLK; see Figure 4[1]
20 - +20 µA
fclk(max)
maximum clock
frequency
ADC0804S030TS
ADC0804S040TS
30
--
MHz
40
--
MHz
ADC0804S050TS
50
--
MHz
tw(clk)H
HIGH clock pulse width full effective bandwidth
tw(clk)L
LOW clock pulse width full effective bandwidth
Analog signal processing
8.5
5.5
--
--
ns
ns
Linearity
INL
DNL
Eoffset
integral non-linearity
differential non-linearity
offset error
EG gain error
Bandwidth (fclk = 40 MHz)
B bandwidth
fclk = 40 MHz; ramp input
fclk = 40 MHz; ramp input
middle code; VRB = 1.3 V;
VRT = 3.67 V
from device to device;
VRB = 1.3 V; VRT = 3.67 V
full-scale sine wave
-
-
-
[4] -
[5] -
±0.2
±0.12
±0.25
±0.1
±0.5
±0.22
-
-
LSB
LSB
LSB
%
15 -
MHz
75 % full-scale sine wave
-
20 -
MHz
ts(LH)
LOW to HIGH settling
time
small signal at mid-scale;
VI = ±10 LSB at code 512
full-scale square wave; see
Figure 6
-
[6] -
350 -
1.5 3.0
MHz
ns
ts(HL)
HIGH to LOW settling
time
-
1.5 3.0
ns
ADC0804S030_040_050_2
Product data sheet
Rev. 02 — 14 August 2008
© NXP B.V. 2008. All rights reserved.
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ADC0804S040

(ADC0804S030 - ADC0804S050) Single 8 bits ADC

NXP Semiconductors
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