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BD80C0AFPS PDF 데이터시트 : 부품 기능 및 핀배열

부품번호 BD80C0AFPS
기능 Low ESR Capacitor
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BD80C0AFPS 데이터시트, 핀배열, 회로
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STRUCTURE
PRODUCT SERIES
TYPE
FEATURES
Silicon Monolithic Integrated Circuit
Low ESR Capacitor,
1A Low Dropout Voltage Regulator
BD80C0AFPS
Output Current : 1A
High Output Voltage Precision : ±1
High Input Voltage : 35V
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ABSOLUTE MAXIMUM RATINGSTa=25℃)
Parameter
Symbol
Limits
Unit
Supply Voltage
1 Vcc
-0.3+35.0
V
Power Dissipation
2
Operating Temperature Range
Storage Temperature Range
Pd
Topr
Tstg
1.2
-40+105
-55+150
W
Maximum Junction Temperature
Tjmax
150
1 Not to exceed Pd.
2 Reduced by 9.6mW / °C over Ta = 25°C, when mounted on glass epoxy board: 70mm×70mm×1.6mm.
OPERATING CONDITIONSTa=25℃)
Parameter
Supply Voltage
Output Current
Symbol
Vcc
Io
Min.
9.0
0
Max.
25.0
1.0
Unit
A
NOTE : This product is not designed for protection against radioactive rays.
REV. A




BD80C0AFPS pdf, 반도체, 판매, 대치품
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10.Output pins
It is necessary to place capacitors between each output pin and GND to prevent oscillation on the output. Usable cawpawcwita.DncaetavSahlueeest4U.com
range from 1μF to 1000μF. Ceramic capacitors can be used as long as their ESR value is low enough to prevent oscillation (0.001Ω
to 20Ω). Abrupt fluctuations in input voltage and load conditions may affect the output voltage. Output capacitance values should
be determined only through sufficient testing of the actual application.
11.Over current protection circuit (OCP)
The IC incorporates an integrated over-current protection circuit that operates in accordance with the rated output capacity. This circuit
serves to protect the IC from damage when the load becomes shorted. It is also designed to limit output current (without latching) in the
event of a large and instantaneous current flow from a large capacitor or other component. These protection circuits are effective in
preventing damage due to sudden and unexpected accidents. However, the IC should not be used in applications characterized by the
continuous or transitive operation of the protection circuits.
12.Thermal shutdown circuit (TSD)
The IC incorporates a built-in thermal shutdown circuit, which is designed to turn the IC off completely in the event of thermal overload.
It is not designed to protect the IC from damage or guarantee its operation. ICs should not be used after this function has activated, or
in applications where the operation of this circuit is assumed.
13.Applications or inspection processes where the potential of the Vcc pin or other pins may be reversed from their normal state may
cause damage to the IC's internal circuitry or elements. Use an output pin capacitance of 1000μF or lower in case Vcc is shorted with
the GND pin while the external capacitor is charged. Insert a diode in series with Vcc to prevent reverse current flow, or insert bypass
diodes between Vcc and each pin.
14.Positive voltage surges on VCC pin
A power zener diode should be inserted between VCC and GND for protection against voltage surges of more than 35V on the VCC
pin.
15.Negative voltage surges on VCC pin
A schottky barrier diode should be inserted between VCC and GND for protection against voltages lower than GND on the VCC pin.
16. Output protection diode
Loads with large inductance components may cause reverse current flow during startup or shutdown. In such cases, a protection
diode should be inserted on the output to protect the IC.
17.Regarding input pins of the IC
This monolithic IC contains P+ isolation and P substrate layers between adjacent elements in order to keep them isolated. PN
junctions are formed at the intersection of these P layers with the N layers of other elements, creating parasitic diodes and/or transistors.
For example (refer to the figure below):
When GND > Pin A and GND > Pin B, the PN junction operates as a parasitic diode
When GND > Pin B, the PN junction operates as a parasitic transistor
Parasitic diodes occur inevitably in the structure of the IC, and the operation of these parasitic diodes can result in mutual interference
among circuits, operational faults, or physical damage. Accordingly, conditions that cause these diodes to operate, such as applying a
voltage lower than the GND voltage to an input pin (and thus to the P substrate) should be avoided.
(Pin A)
P+
N
P
Resistor
(Pin B)
Transistor (NPN)
B
CE
P P+
NN
Parasitic elements
GND
N
P+ P P+
N NN
Parasitic elements
or transistors
P substrate
GND
Example of Simple Monolithic IC Architecture
(Pin B)
BC
E
GND
Parasitic elements
or transistors
(Pin A)
Parasitic elements
REV. A

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BD80C0AFPS

Low ESR Capacitor

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