PDF TDA9882 Data sheet ( Hoja de datos )

Número de pieza	TDA9882
Descripción	Alignment-free multistandard vision and QSS FM sound IF PLL demodulator
Fabricantes	NXP Semiconductors
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No Preview Available ! TDA9882 www.DataSheet4U.com Alignment-free multistandard vision and QSS FM sound IF PLL demodulator Rev. 01 — 16 November 2004 Product data sheet 1. General description The TDA9882 is an alignment-free multistandard (PAL, SECAM and NTSC) vision and sound IF signal PLL demodulator for positive and negative modulation, including Quasi Split Sound (QSS) FM and AM sound processing. 2. Features s 5 V supply voltage s Gain controlled wideband Vision Intermediate Frequency (VIF) ampliﬁer; AC-coupled s Multistandard true synchronous demodulation with active carrier regeneration: very linear demodulation, good intermodulation ﬁgures, reduced harmonics and excellent pulse response s Gated phase detector for L and L-accent standard s Fully integrated VIF Voltage Controlled Oscillator (VCO), alignment-free, frequencies switchable via logic pin VIF0 and pin QSSO with resistor for negative and positive modulated standards s Digital acquisition help circuit, VIF frequencies of 38.9 MHz and 45.75 MHz (negative modulation); 38.9 MHz and 33.9 MHz (positive modulation) s 4 MHz reference frequency input signal from Phase-Locked Loop (PLL) tuning system or operating as crystal oscillator s VIF Automatic Gain Control (AGC) detector for gain control; operating as peak sync detector for negative modulated signals and as a peak white detector for positive modulated signals s VIF AGC monitor output at pin VAGC s Precise fully digital Automatic Frequency Control (AFC) detector with 4-bit digital-to-analog converter s TakeOver Point (TOP) adjustable with potentiometer s Fully integrated sound carrier trap for 4.5 MHz, 5.5 MHz, 6.0 MHz and 6.5 MHz; controlled by FM PLL oscillator s Sound IF (SIF) input for single reference Quasi Split Sound (QSS) mode; PLL controlled s SIF AGC for gain controlled SIF ampliﬁer; single reference QSS mixer able to operate in high performance single reference QSS mode s AM sound demodulator without extra reference circuit s Alignment-free selective FM PLL demodulator with high linearity and low noise. 1 page Philips Semiconductors 7. Pinning information 7.1 Pinning TDA9882 www.DataSheet4U.com Multistandard vision and QSS FM sound IF PLL demodulator VIF1 1 VIF2 2 i.c. 3 FMPLL 4 DEEM 5 AFD 6 DGND 7 AUD 8 TOP 9 FM1 10 FM0 11 QSSO 12 TDA9882TS 24 SIF2 23 SIF1 22 VAGC 21 AFC 20 VP 19 VPLL 18 AGND 17 CVBS 16 CAGC 15 REF 14 TAGC 13 VIF0 001aab484 Fig 2. Pin conﬁguration for SSOP24. terminal 1 index area i.c. FMPLL DEEM AFD DGND n.c. AUD TOP 1 2 3 4 5 6 7 8 TDA9882HN 24 VAGC 23 AFC 22 VP 21 VPLL 20 AGND 19 n.c. 18 CVBS 17 CAGC Transparent top view Fig 3. Pin conﬁguration for HVQFN32. 001aab485 9397 750 13507 Product data sheet Rev. 01 — 16 November 2004 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 5 of 45 5 Page Philips Semiconductors TDA9882 www.DataSheet4U.com Multistandard vision and QSS FM sound IF PLL demodulator The intercarrier signal from the single reference QSS mixer is fed to the input of an AC-coupled gain controlled ampliﬁer with two stages. The gain controlled output signal is fed to the phase detector of the narrow-band FM PLL (FM demodulator). For good selectivity and robustness against disturbance caused by the video signal, a high linearity of the gain controlled FM ampliﬁer and of the phase detector as well as a constant signal level are required. The gain control is done by means of an ‘in phase’ demodulator for the FM carrier (from the output of the FM ampliﬁer). The demodulation output is fed into a comparator for charging or discharging the integrated AGC capacitor. This leads to a mean value AGC loop to control the gain of the FM ampliﬁer. The FM demodulator is realized as a narrow-band PLL with an external loop ﬁlter, which provides the necessary selectivity (bandwidth approximately 100 kHz). To achieve good selectivity, a linear phase detector and a constant input level are required. The gain controlled intercarrier signal from the FM ampliﬁer is fed to the phase detector. The phase detector controls, via the loop ﬁlter, the integrated low radiation relaxation oscillator. The designed frequency range is from 4 MHz to 7 MHz. The VCO within the FM PLL is phase-locked to the incoming 2nd SIF signal which is frequency modulated. The VCO control voltage is superimposed by the AF voltage. Therefore, the VCO tracks with the FM of the 2nd SIF signal. Thus, the AF voltage is present at the loop ﬁlter and is typically 5 mV (RMS) for 27 kHz FM deviation. This AF signal is fed via a buffer to the audio ampliﬁer. The correct locking of the PLL is supported by the digital acquisition help circuit; see Section 8.6. 8.14 Audio ampliﬁer and mute time constant The audio ampliﬁer consists of two parts: • AF preampliﬁer • AF output ampliﬁer. The AF preampliﬁer used for FM sound is an operational ampliﬁer with internal feedback, high gain and high common mode rejection. The AF voltage from the PLL demodulator is 5 mV (RMS) for a frequency deviation of 27 kHz and is ampliﬁed by 30 dB. By using a DC operating point control circuit (with external capacitor CAF), the AF preampliﬁer is decoupled from the PLL DC voltage. The low-pass characteristic of the ampliﬁer reduces the harmonics of the sound intercarrier signal at the AF output terminal. For FM sound a switchable de-emphasis network (with external capacitor) is implemented between the preampliﬁer and the output ampliﬁer. The de-emphasis time constant with 50 µs or 75 µs depends on the FM carrier selection via pins FM0 and FM1; see Table 5. The AF output ampliﬁer provides the required AF output level by a rail-to-rail output stage. A preceding stage makes use of an input selector for switching between the FM sound, AM sound and mute state. Switching to the mute state is controlled automatically, depending on the digital acquisition help circuit should the VCO of the FM PLL not be in the required frequency window. This is done by a time constant: fast for switching to the mute state and slow (typically 40 ms) for switching to the non-mute state. Auto mute can be disabled via pins SIF1 and SIF2 with resistor; see Table 6. 9397 750 13507 Product data sheet Rev. 01 — 16 November 2004 © Koninklijke Philips Electronics N.V. 2004. All rights reserved. 11 of 45 11 Page

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