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PDF STD4N62K3 Data sheet ( Hoja de datos )
| Número de pieza | STD4N62K3 | |
| Descripción | SuperMESH3 Power MOSFET | |
| Fabricantes | ST Microelectronics | |
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STD4N62K3
STU4N62K3
N-channel 620 V, 1.8 Ω, 3.8 A SuperMESH3™ Power MOSFET
DPAK, IPAK
Preliminary data
Features
Type
STD4N62K3
STU4N62K3
VDSS
RDS(on)
max
620 V < 1.95 Ω
ID
3.8 A
Pw
70 W
■ 100% avalanche tested
■ Extremely high dv/dt capability
■ Gate charge minimized
■ Very low intrinsic capacitances
■ Improved diode reverse recovery
characteristics
■ Zener-protected
Application
■ Switching applications
Description
These devices are made using the
SuperMESH3™ Power MOSFET technology that
is obtained via improvements applied to
STMicroelectronics’ SuperMESH™ technology
combined with a new optimized vertical structure.
The resulting product has an extremely low on
resistance, superior dynamic performance and
high avalanche capability, making it especially
suitable for the most demanding applications.
3
1
DPAK
3
2
1
IPAK
Figure 1. Internal schematic diagram
D(2)
G(1)
S(3)
AM01476v1
Table 1. Device summary
Order codes
STD4N62K3
STU4N62K3
Marking
4N62K3
Package
DPAK
IPAK
Packaging
Tape and reel
Tube
May 2010
Doc ID 17549 Rev 1
This is preliminary information on a new product now in development or undergoing evaluation. Details are subject to
change without notice.
1/12
www.st.com
12
1 page  
STD4N62K3, STU4N62K3
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Electrical characteristics
Table 6.
Symbol
Switching times
Parameter
td(on)
tr
td(off)
tf
Turn-on delay time
Rise time
Turn-off-delay time
Fall time
Test conditions
VDD = 300 V, ID = 1.9 A,
RG = 4.7 Ω, VGS = 10 V
(see Figure 2)
Min. Typ. Max Unit
TBD
TBD
--
TBD
TBD
ns
ns
ns
ns
Table 7.
Symbol
Source drain diode
Parameter
Test conditions
Min. Typ. Max. Unit
ISD
ISDM (1)
VSD (2)
Source-drain current
Source-drain current (pulsed)
Forward on voltage
ISD = 3.8 A, VGS = 0
3.8 A
-
15.2 A
- 1.6 V
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
TBD
ISD = 3.8 A, di/dt = 100 A/µs
VDD = 60 V (see Figure 7)
-
TBD
TBD
ns
nC
A
trr
Qrr
IRRM
Reverse recovery time
Reverse recovery charge
Reverse recovery current
ISD = 3.8 A, di/dt = 100 A/µs
TBD
VDD = 60 V, Tj = 150 °C
(see Figure 7)
- TBD
TBD
ns
nC
A
1. Pulse width limited by safe operating area
2. Pulsed: Pulse duration = 300 µs, duty cycle 1.5%
Table 8.
Symbol
Gate-source Zener diode
Parameter
Test conditions
Min. Typ. Max. Unit
BVGSO(1)
Gate-source breakdown
voltage
Igs=± 1 mA (open drain)
30
-
V
1. The built-in back-to-back Zener diodes have specifically been designed to enhance not only the device’s
ESD capability, but also to make them safely absorb possible voltage transients that may occasionally be
applied from gate to source. In this respect the Zener voltage is appropriate to achieve an efficient and
cost-effective intervention to protect the device’s integrity. These integrated Zener diodes thus avoid the
usage of external components
Doc ID 17549 Rev 1
5/12
5 Page 
STD4N62K3, STU4N62K3
6 Revision history
Table 9. Document revision history
Date
Revision
05-May-2010
1 First release
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Revision history
Changes
Doc ID 17549 Rev 1
11/12
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| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet STD4N62K3.PDF ] | |
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