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PDF LP3961ET-2.5 Data sheet ( Hoja de datos )

Número de pieza LP3961ET-2.5
Descripción 800mA Fast Ultra Low Dropout Linear Regulators
Fabricantes National Semiconductor 
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May 2000
LP3961/LP3964
800mA Fast Ultra Low Dropout Linear Regulators
General Description
The LP3961/LP3964 series of fast ultra low-dropout linear
regulators operate from a +2.5V to +7.0V input supply. Wide
range of preset output voltage options are available. These
ultra low dropout linear regulators respond very fast to step
changes in load which makes them suitable for low voltage
microprocessor applications. The LP3961/LP3964 are de-
veloped on a CMOS process which allows low quiescent
current operation independent of output load current. This
CMOS process also allows the LP3961/LP3964 to operate
under extremely low dropout conditions.
Dropout Voltage: Ultra low dropout voltage; typically 24mV
at 80mA load current and 240mV at 800mA load current.
Ground Pin Current: Typically 4mA at 800mA load current.
Shutdown Mode: Typically 15µA quiescent current when
the shutdown pin is pulled low.
Error Flag: Error flag goes low when the output voltage
drops 10% below nominal value (for LP3961).
SENSE: Sense pin improves regulation at remote loads.
(For LP3964)
Precision Output Voltage: Multiple output voltage options
are available ranging from 1.2V to 5.0V and adjustable, with
a guaranteed accuracy of ±1.5% at room temperature, and
±3.0% over all conditions ( varying line, load, and tempera-
ture).
Features
n Ultra low dropout voltage
n Low ground pin current
n Load regulation of 0.02%
n 15µA quiescent current in shutdown mode
n Guaranteed output current of 0.8A DC
n Available in SOT-223,TO-263 and TO-220 packages
n Output voltage accuracy ± 1.5%
n Error flag indicates output status (LP3961)
n Sense option improves better load regulation (LP3964)
n Extremely low output capacitor requirements
n Overtemperature/overcurrent protection
n −40˚C to +125˚C junction temperature range
Applications
n Microprocessor power supplies
n GTL, GTL+, BTL, and SSTL bus terminators
n Power supplies for DSPs
n SCSI terminator
n Post regulators
n High efficiency linear regulators
n Battery chargers
n Other battery powered applications
Typical Application Circuits
DS101129-1
# Minimum output capacitance is 10 µF to ensure stability over full load current range. More capacitance provides superior dynamic performance and additional
stability margin.
*SD and ERROR pins must be pulled high through a 10kpull-up resistor. Connect the ERROR pin to ground if this function is not used. See applications sec-
tion for more information.
© 2000 National Semiconductor Corporation DS101129
www.national.com

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LP3961ET-2.5 pdf
Ordering Information
Package Type Designator is MPfor SOT223 package, Tfor TO220 package, and Sfor TO263 package.
DS101129-31
TABLE 1. Package Marking and Ordering Information
Output
Voltage
5.0
Order Number
LP3961EMP-5.0
Description
(Current, Option)
800mA, Error Flag
Package
Type
SOT223-5
Package Marking
LBSB
5.0 LP3961EMPX-5.0
800mA, Error Flag
SOT223-5
LBSB
3.3 LP3961EMP-3.3
800mA, Error Flag
SOT223-5
LAZB
3.3 LP3961EMPX-3.3
800mA, Error Flag
SOT223-5
LAZB
2.5 LP3961EMP-2.5
800mA, Error Flag
SOT223-5
LBBB
2.5 LP3961EMPX-2.5
800mA, Error Flag
SOT223-5
LBBB
1.8 LP3961EMP-1.8
800mA, Error Flag
SOT223-5
LBAB
1.8 LP3961EMPX-1.8
800mA, Error Flag
SOT223-5
LBAB
5.0 LP3964EMP-5.0
800mA, SENSE
SOT223-5
LBUB
5.0 LP3964EMPX-5.0
800mA, SENSE
SOT223-5
LBUB
3.3 LP3964EMP-3.3
800mA, SENSE
SOT223-5
LBJB
3.3 LP3964EMPX-3.3
800mA, SENSE
SOT223-5
LBJB
2.5 LP3964EMP-2.5
800mA, SENSE
SOT223-5
LBHB
2.5 LP3964EMPX-2.5
800mA, SENSE
SOT223-5
LBHB
1.8 LP3964EMP-1.8
800mA, SENSE
SOT223-5
LBFB
1.8 LP3964EMPX-1.8
800mA, SENSE
SOT223-5
LBFB
ADJ LP3964EMP-ADJ
800mA, ADJ
SOT223-5
LBPB
Supplied As:
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
2000 units on
Tape and Reel
1000 units on
Tape and Reel
5 www.national.com

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LP3961ET-2.5 arduino
Applications Information
Input Capacitor Selection
The LP3961 and LP3964 require a minimum input capaci-
tance of 10µF between the input and ground pins to prevent
any impedance interactions with the supply. This capacitor
should be located very close to the VIN pin. This capacitor
can be of any type such as ceramic, tantalum, or aluminium.
Any good quality capacitor which has good tolerance over
temperature and frequency is recommended.
Output Capacitor Selection
The LP3961 and LP3964 require a minimum of 10µF capaci-
tance between the output and ground pins for proper opera-
tion. LP3961 and LP3964 work best with Tantalum or Elec-
trolytic capacitor. The output capacitor should have a good
tolerance over temperature, voltage, and frequency. Larger
capacitance provides better improved load dynamics and
noise performance. The output capacitor should be con-
nected very close to the Vout pin.
Output Adjustment
An adjustable output device has output voltage range of
1.215V to 5.1V. To obtain a desired output voltage, the fol-
lowing equation can be used with R1 always a 10kresistor.
For output stability, CF must be between 68pF and 100pF.
Output Noise
Noise is specified in two ways-
Spot Noise or Output noise density is the RMS sum of all
noise sources, measured at the regulator output, at a spe-
cific frequency (measured with a 1Hz bandwidth). This type
of noise is usually plotted on a curve as a function of fre-
quency.
Total output Noise or Broad-band noise is the RMS sum
of spot noise over a specified bandwidth, usually several de-
cades of frequencies.
Attention should be paid to the units of measurement. Spot
noise is measured in units µV/Hz or nV/Hz and total output
noise is measured in µV(rms).
The primary source of noise in low-dropout regulators is the
internal reference. In CMOS regulators, noise has a low fre-
quency component and a high frequency component, which
depend strongly on the silicon area and quiescent current.
Noise can be reduced in two ways: by increasing the transis-
tor area or by increasing the current drawn by the internal
reference. Increasing the area will decrease the chance of
fitting the die into a smaller package. Increasing the current
drawn by the internal reference increases the total supply
current (ground pin current). Using an optimized trade-off of
ground pin current and die size, LP3961/LP3964 achieves
low noise performance and low quiescent current operation.
The total output noise specification for LP3961/LP3964 is
presented in the Electrical Characteristics table. The Output
noise density at different frequencies is represented by a
curve under typical performance characteristics.
Short-Circuit Protection
The LP3961and LP3964 is short circuit protected and in the
event of a peak over-current condition, the short-circuit con-
trol loop will rapidly drive the output PMOS pass element off.
Once the power pass element shuts down, the control loop
will rapidly cycle the output on and off until the average
power dissipation causes the thermal shutdown circuit to re-
spond to servo the on/off cycling to a lower frequency.
Please refer to the section on thermal information for power
dissipation calculations.
Error Flag Operation
The LP3961/LP3964 produces a logic low signal at the Error
Flag pin when the output drops out of regulation due to low
input voltage, current limiting, or thermal limiting. This flag
has a built in hysteresis. The timing diagram in Figure 1
shows the relationship between the ERROR and the output
voltage. In this example, the input voltage is changed to
demonstrate the functionality of the Error Flag.
The internal Error flag comparator has an open drain output
stage. Hence, the ERROR pin should be pulled high through
a pull up resistor. Although the ERROR pin can sink current
of 1mA, this current is energy drain from the input supply.
Hence, the value of the pull up resistor should be in the
range of 100kto 1M. The ERROR pin must be con-
nected to ground if this function is not used. It should
also be noted that when the shutdown pin is pulled low, the
ERROR pin is forced to be invalid for reasons of saving
power in shutdown mode.
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