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PDF BUK6208-40C Data sheet ( Hoja de datos )
| Número de pieza | BUK6208-40C | |
| Descripción | N-channel TrenchMOS intermediate level FET | |
| Fabricantes | NXP Semiconductors | |
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BUK6208-40C
www.DataSheet4U.com
N-channel TrenchMOS intermediate level FET
Rev. 01 — 9 April 2010
Objective data sheet
1. Product profile
1.1 General description
Intermediate level gate drive N-channel enhancement mode Field-Effect Transistor (FET)
in a plastic package using advanced TrenchMOS technology. This product has been
designed and qualified to the appropriate AEC Q101 standard for use in high performance
automotive applications.
1.2 Features and benefits
AEC Q101 compliant
Suitable for intermediate level gate
drive sources
Suitable for thermally demanding
environments due to 175 °C rating
1.3 Applications
12 V Automotive systems
Electric and electro-hydraulic power
steering
Motors, lamps and solenoid control
Start-Stop micro-hybrid applications
Transmission control
Ultra high performance power
switching
1.4 Quick reference data
Table 1. Quick reference data
Symbol
VDS
Parameter
drain-source
voltage
Conditions
Tj ≥ 25 °C; Tj ≤ 175 °C
ID
drain current
VGS = 10 V; Tmb = 25 °C
Ptot
total power
Tmb = 25 °C; see Figure 1
dissipation
Static characteristics
RDSon
drain-source
on-state
resistance
VGS = 10 V; ID = 25 A;
Tj = 25 °C
Avalanche ruggedness
EDS(AL)S
non-repetitive
drain-source
avalanche energy
Dynamic characteristics
ID = 50 A; Vsup ≤ 40 V;
RGS = 50 Ω; VGS = 10 V;
Tj(init) = 25 °C; unclamped
QGD
gate-drain charge ID = 25 A; VDS = 32 V;
VGS = 10 V; see Figure 6
Min Typ Max Unit
- - 40 V
[1] - - 50 A
- - 128 W
- 6.6 8 mΩ
- - 210 mJ
- - - nC
1 page  
NXP Semiconductors
www.DataSheet4U.com
BUK6208-40C
N-channel TrenchMOS intermediate level FET
6. Characteristics
Table 6. Characteristics
Symbol
Parameter
Static characteristics
V(BR)DSS
drain-source
breakdown voltage
VGS(th)
gate-source threshold
voltage
IDSS
IGSS
RDSon
drain leakage current
gate leakage current
drain-source on-state
resistance
Dynamic characteristics
QG(tot)
total gate charge
QGS gate-source charge
QGD gate-drain charge
Ciss input capacitance
Coss output capacitance
Crss reverse transfer
capacitance
td(on)
tr
td(off)
tf
LD
turn-on delay time
rise time
turn-off delay time
fall time
internal drain
inductance
LS internal source
inductance
Source-drain diode
VSD source-drain voltage
trr reverse recovery time
Qr recovered charge
Conditions
ID = 250 µA; VGS = 0 V; Tj = 25 °C
ID = 250 µA; VGS = 0 V; Tj = -55 °C
ID = 1 mA; VDS = VGS; Tj = 25 °C;
see Figure 3; see Figure 4
ID = 1 mA; VDS = VGS; Tj = -55 °C;
see Figure 3
ID = 1 mA; VDS = VGS; Tj = 175 °C;
see Figure 3
VDS = 40 V; VGS = 0 V; Tj = 175 °C
VDS = 40 V; VGS = 0 V; Tj = 25 °C
VDS = 0 V; VGS = 20 V; Tj = 25 °C
VDS = 0 V; VGS = -20 V; Tj = 25 °C
VGS = 10 V; ID = 25 A; Tj = 25 °C
VGS = 5 V; ID = 15 A; Tj = 25 °C
VGS = 4.5 V; ID = 15 A; Tj = 25 °C
VGS = 10 V; ID = 25 A; Tj = 175 °C;
see Figure 5
ID = 25 A; VDS = 32 V; VGS = 10 V;
see Figure 6
ID = 25 A; VDS = 32 V; VGS = 5 V;
see Figure 6
ID = 25 A; VDS = 32 V; VGS = 10 V;
see Figure 6
VGS = 0 V; VDS = 25 V; f = 1 MHz;
Tj = 25 °C
VDS = 30 V; RL = 1.2 Ω; VGS = 10 V;
RG(ext) = 10 Ω
from upper edge of drain mounting base
to centre of die ; Tj = 25 °C
from source lead to source bond pad ;
Tj = 25 °C
IS = 25 A; VGS = 0 V; Tj = 25 °C
IS = 20 A; dIS/dt = -100 A/µs; VGS = 0 V;
VDS = 25 V
BUK6208-40C
Objective data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 9 April 2010
Min Typ Max Unit
40 - - V
36 - - V
1.8 2.3 2.8 V
- - 3.3 V
0.8 - - V
- - 500 µA
-
0.02 1
µA
- 2 100 nA
- 2 100 nA
-
6.6 8
mΩ
- - [tbd] mΩ
- - [tbd] mΩ
- - 16.8 mΩ
- - - nC
- - - nC
- - - nC
- - - nC
- 3000 [tbd] pF
- 450 [tbd] pF
- 330 [tbd] pF
- - - ns
- - - ns
- - - ns
- - - ns
- 3.5 - nH
- 7.5 - nH
- 0.85 1.2 V
- - - ns
- - - nC
© NXP B.V. 2010. All rights reserved.
5 of 11
5 Page 
NXP Semiconductors
11. Contents
1 Product profile . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.1 General description . . . . . . . . . . . . . . . . . . . . . .1
1.2 Features and benefits . . . . . . . . . . . . . . . . . . . . .1
1.3 Applications . . . . . . . . . . . . . . . . . . . . . . . . . . . .1
1.4 Quick reference data . . . . . . . . . . . . . . . . . . . . .1
2 Pinning information . . . . . . . . . . . . . . . . . . . . . . .2
3 Ordering information . . . . . . . . . . . . . . . . . . . . . .2
4 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . .3
5 Thermal characteristics . . . . . . . . . . . . . . . . . . .4
6 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . .5
7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . .7
8 Revision history . . . . . . . . . . . . . . . . . . . . . . . . . .8
9 Legal information. . . . . . . . . . . . . . . . . . . . . . . . .9
9.1 Data sheet status . . . . . . . . . . . . . . . . . . . . . . . .9
9.2 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
9.3 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9
9.4 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . .10
10 Contact information. . . . . . . . . . . . . . . . . . . . . .10
www.DataSheet4U.com
BUK6208-40C
N-channel TrenchMOS intermediate level FET
Please be aware that important notices concerning this document and the product(s)
described herein, have been included in section ‘Legal information’.
© NXP B.V. 2010.
All rights reserved.
For more information, please visit: http://www.nxp.com
For sales office addresses, please send an email to: [email protected]
Date of release: 9 April 2010
Document identifier: BUK6208-40C
11 Page | ||
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