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PDF TJA1043 Data sheet ( Hoja de datos )
| Número de pieza | TJA1043 | |
| Descripción | High-speed CAN transceiver | |
| Fabricantes | NXP Semiconductors | |
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TJA1043
High-speed CAN transceiver
Rev. 01 — 30 March 2010
www.DataSheet4U.com
Product data sheet
1. General description
The TJA1043 is a high-speed CAN transceiver that provides an interface between a
Controller Area Network (CAN) protocol controller and the physical two-wire CAN bus.
The transceiver is designed for high-speed (up to 1 Mbit/s) CAN applications in the
automotive industry, providing differential transmit and receive capability to (a
microcontroller with) a CAN protocol controller.
The TJA1043 is a step up from the TJA1041A high-speed CAN transceiver. It offers
improved ElectroMagnetic Compatibility (EMC) and ElectroMagnetic Discharge (ESD)
performance, very low power consumption, and passive behavior when the supply voltage
is turned off. Advanced features include:
• Low-power management controls the power supply throughout the node while
supporting local and remote wake-up with wake-up source recognition
• Several protection and diagnostic functions including bus line short-circuit detection
and battery connection detection
• Can be interfaced directly to microcontrollers with supply voltages from 3 V to 5 V
These features make the TJA1043 the ideal choice for high speed CAN networks
containing nodes that need to be available all times, even when the internal VIO and VCC
supplies are switched off.
2. Features and benefits
2.1 General
Fully ISO 11898-2 and ISO 11898-5 compliant
Suitable for 12 V and 24 V systems
Low ElectroMagnetic Emission (EME) and high ElectroMagnetic Immunity (EMI)
VIO input allows for direct interfacing with 3 V and 5 V microcontrollers
SPLIT voltage output for stabilizing the recessive bus level
Listen-only mode for node diagnosis and failure containment
2.2 Low-power management
Very low current Standby and Sleep modes, with local and remote wake-up
Capability to power down the entire node while supporting local, remote and host
wake-up
Wake-up source recognition
Transceiver disengages from the bus (zero load) when VBAT absent
Functional behavior predictable under all supply conditions
1 page  
NXP Semiconductors
www.DataSheet4U.com
TJA1043
High-speed CAN transceiver
6.1 Operating modes
The TJA1043 supports five operating modes. Control pins STB_N and EN are used to
select the operating mode. Switching between modes allows access to a number of
diagnostics flags via pin ERR_N. Table 3 describes how to switch between modes.
Figure 3 illustrates the mode transitions when VCC, VIO and VBAT are valid.
Table 3. Operating mode selection
Internal flags
Control pins
Operating mode
UVNOM[1] UVBAT
Wake[2] STB_N[3] EN
From Normal, Listen-only, Standby and Go-to-Sleep modes
set X X X X Sleep mode
cleared set
X
HIGH
X
Standby mode
cleared X
set
LOW
X
Standby mode
cleared X
cleared LOW
LOW
Standby mode
cleared X
cleared LOW
HIGH
Go-to-Sleep mode[4]
cleared cleared X
HIGH
LOW
Listen-only mode
cleared cleared X
HIGH
HIGH
Normal mode
From Sleep mode
set X X X X Sleep mode
cleared set
X
HIGH
X
Standby mode
cleared X
set
LOW
X
Standby mode
cleared X
cleared LOW
X
Sleep mode
cleared cleared X
HIGH
LOW
Listen-only mode
cleared cleared X
HIGH
HIGH
Normal mode
Pin INH
floating
HIGH
HIGH
HIGH
HIGH[4]
HIGH
HIGH
floating
HIGH
HIGH
floating
HIGH
HIGH
[1] Setting the UVNOM flag will clear the WAKE flag.
[2] Setting the Wake flag will clear the UVNOM flag.
[3] A LOW-to-HIGH transition on pin STB_N will clear the UVNOM flag
[4] After th(min) in Go-to-Sleep mode, the transceiver will enter Sleep mode and pin INH will be set floating.
TJA1043_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 30 March 2010
© NXP B.V. 2010. All rights reserved.
5 of 26
5 Page 
NXP Semiconductors
www.DataSheet4U.com
TJA1043
High-speed CAN transceiver
6.6 WAKE pin
A local wake-up event is triggered by a LOW-to-HIGH or HIGH-to-LOW transition on the
WAKE pin, allowing for maximum flexibility when designing a local wake-up circuit.To
minimize current consumption, the internal bias voltage will follow the logic state on the
pin after a delay of twake(min). A HIGH level on pin WAKE is followed by an internal pull-up
to VBAT. A LOW level on pin WAKE is followed by an internal pull-down towards GND. In
applications that don’t make use of the local wake-up facility, it is recommended that the
WAKE pin be connected to VBAT or GND to ensure optimal EMI performance.
TJA1043_1
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 01 — 30 March 2010
© NXP B.V. 2010. All rights reserved.
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