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Número de pieza | MFRC523 | |
Descripción | Contactless reader IC | |
Fabricantes | NXP Semiconductors | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de MFRC523 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
No Preview Available ! MFRC523
Contactless reader IC
Rev. 3.3 — 5 March 2010
115233
www.DataSheet4U.com
Product data sheet
PUBLIC
1. Introduction
This document describes the functionality and electrical specifications of the contactless
reader/writer MFRC523.
2. General description
The MFRC523 is a highly integrated reader/writer for contactless communication at
13.56 MHz. The MFRC523 reader supports ISO/IEC 14443 A/MIFARE mode.
The MFRC523’s internal transmitter is able to drive a reader/writer antenna designed to
communicate with ISO/IEC 14443 A/MIFARE cards and transponders without additional
active circuitry. The receiver module provides a robust and efficient implementation for
demodulating and decoding signals from ISO/IEC 14443 A/MIFARE compatible cards and
transponders. The digital module manages the complete ISO/IEC 14443 A framing and
error detection (parity and CRC) functionality.
The MFRC523 supports MIFARE Mini, MIFARE 1K and MIFARE 4K (MIFARE Standard)
products. The MFRC523 supports contactless communication and uses MIFARE higher
transfer speeds up to 848 kBd in both directions.
The MFRC523 supports all layers of the ISO/IEC 14443 B reader/writer communication
protocol provided that, external components such as oscillator, power supply and coil, and
standard protocols such as ISO/IEC 14443-4 and/or ISO/IEC 14443 B anticollision are
correctly implemented.
Note that the use of this NXP Semiconductors device in accordance with
ISO/IEC 14443 B may infringe on third-party patent rights. It is the responsibility of the
user to ensure that appropriate third-party patent licenses exist.
The following host interfaces are provided:
• Serial Peripheral Interface (SPI)
• Serial UART (similar to RS232 with voltage levels dependent on pin voltage supply)
• I2C-bus interface
1 page NXP Semiconductors
www.DataSheet4U.com
MFRC523
Contactless reader IC
SDA/NSS/RX EA I2C
24 32 1
D6/ADR_0/
D2/ADR_4 D4/ADR_2 MOSI/MX
D5/ADR_1/ D7/SCL/
D1/ADR_5 D3/ADR_3 SCK/DTRQ MISO/TX
PVDD PVSS
25 26 27 28 29 30 31
25
SPI, UART, I2C-BUS INTERFACE CONTROL
FIFO CONTROL
64-BYTE FIFO
BUFFER
CONTROL REGISTER
BANK
STATE MACHINE
COMMAND REGISTER
PROGRAMABLE TIMER
INTERRUPT CONTROL
VOLTAGE
MONITOR
AND
POWER ON
DETECT
3
DVDD
4 DVSS
15 AVDD
18 AVSS
RESET
CONTROL
POWER-DOWN
CONTROL
6 NRSTPD
23 IRQ
MIFARE CLASSIC UNIT
CRC16
GENERATION AND CHECK
RANDOM NUMBER
GENERATOR
AMPLITUDE
RATING
REFERENCE
VOLTAGE
ANALOG TEST
MULTIPLEXOR
AND
DIGITAL TO
ANALOG
CONVERTER
PARALLEL/SERIAL
CONVERTER
BIT COUNTER
PARITY GENERATION AND CHECK
FRAME GENERATION AND CHECK
BIT DECODING
BIT ENCODING
SERIAL DATA SWITCH
ANALOG TO DIGITAL
CONVERTER
CLOCK
GENERATION,
FILTERING AND
DISTRIBUTION
OSCILLATOR
7 MFIN
8 MFOUT
9
SVDD
21
OSCIN
22 OSCOUT
I-CHANNEL
AMPLIFIER
I-CHANNEL
DEMODULATOR
Q-CHANNEL
AMPLIFIER
Q-CHANNEL
DEMODULATOR
Q-CLOCK
GENERATION
TEMPERATURE
SENSOR
TRANSMITTER CONTROL
16 19 20
VMID AUX1 AUX2
17
RX
Fig 2. Detailed block diagram of the MFRC523
10, 14 11
TVSS TX1
13 12
TX2 TVDD
001aak602
MFRC523_33
Product data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 5 March 2010
115233
© NXP B.V. 2010. All rights reserved.
5 of 98
5 Page NXP Semiconductors
www.DataSheet4U.com
MFRC523
Contactless reader IC
Table 6.
Line
MOSI
MISO
MOSI and MISO byte order
Byte 0
Byte 1
Byte 2
address 0 address 1 address 2
X[1]
data 0
data 1
[1] X = Do not care.
Remark: The MSB must be sent first.
To
...
...
Byte n
address n
data n − 1
Byte n + 1
00
data n
8.3.2.2 SPI write data
To write data to the MFRC523 using SPI requires the byte order shown in Table 7. It is
possible to write up to n data bytes by only sending one address byte.
The first send byte defines both the mode and the address byte.
Table 7.
Line
MOSI
MISO
MOSI and MISO byte order
Byte 0
Byte 1
Byte 2
address 0 data 0
data 1
X[1] X[1] X[1]
[1] X = Do not care.
Remark: The MSB must be sent first.
To
...
...
Byte n
data n − 1
X[1]
Byte n + 1
data n
X[1]
8.3.2.3 SPI address byte
The address byte must meet the following format.
The MSB of the first byte defines the mode used. To read data from the MFRC523 the
MSB is set to logic 1. To write data to the MFRC523 the MSB must be set to logic 0. Bits 6
to 1 define the address and the LSB is set to logic 0.
Table 8. Address byte 0 register; address MOSI
7 (MSB) 6 5 4 3 2 1 0 (LSB)
1 = read address
0 = write
0
8.3.3 UART interface
8.3.3.1 Connection to a host
MFRC523
RX
RX
TX
TX
DTRQ
MX
DTRQ
MX
001aal158
Fig 8. UART connection to microcontrollers
MFRC523_33
Product data sheet
PUBLIC
All information provided in this document is subject to legal disclaimers.
Rev. 3.3 — 5 March 2010
115233
© NXP B.V. 2010. All rights reserved.
11 of 98
11 Page |
Páginas | Total 30 Páginas | |
PDF Descargar | [ Datasheet MFRC523.PDF ] |
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