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PDF CS42L55 Data sheet ( Hoja de datos )
| Número de pieza | CS42L55 | |
| Descripción | Stereo CODEC | |
| Fabricantes | Cirrus Logic | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de CS42L55 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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www.DataSheet4U.com
CS42L55
Ultra Low Power, Stereo CODEC w/Class H Headphone Amp
DIGITAL to ANALOG FEATURES
5 mW Stereo Playback Power Consumption
99 dB Dynamic Range (A-wtd)
-86 dB THD+N
Digital Signal Processing Engine
– Bass & Treble Tone Control, De-Emphasis
– Master Volume Control (+12 to -102 dB in
0.5 dB steps)
– Soft-Ramp & Zero-Cross Transitions
– Programmable Peak-Detect and Limiter
– Beep Generator w/Full Tone Control
Stereo Headphone and Line Amplifiers
Step-Down/Inverting Charge Pump
Class H Amplifier - Automatic Supply Adj.
– High Efficiency
– Low EMI
Pseudo-Differential Ground-Centered Outputs
High HP Power Output at -75 dB THD+N
– 2 x 20 mW Into 32 Ω @1.8 V
– 2 x 20 mW Into 16 Ω @1.8 V
1 VRMS Line Output @1.8 V
Analog Vol. Ctl. (+12 to -55 dB in 1 dB steps)
Analog In to Analog Out Passthrough
Pop and Click Suppression
ANALOG to DIGITAL FEATURES
3.5 mW Stereo Record Power Consumption
95 dB Dynamic Range (A-wtd)
-87 dB THD+N
2:1 Stereo Input MUX
Analog Programmable Gain Amplifier (PGA)
(+12 to -6 dB in 0.5 dB steps)
+20 dB Boost
Programmable Automatic Level Control (ALC)
– Noise Gate for Noise Suppression
– Programmable Threshold &
Attack/Release Rates
Independent ADC Channel Control
Digital Vol. Ctl. (0 to -96 dB in 1 dB steps)
High-Pass Filter Disable for DC Measurements
Pseudo Differential Inputs
SYSTEM FEATURES
12 MHz USB Master Clock Input
Low Power Operation
– Stereo Anlg. Passthrough: 3.3 mW @1.8 V
– Stereo Rec. and Playback: 8.3 mW @1.8 V
Headphone Detect Input
(SYSTEM FEATURES continued on page 2)
+1.65 V to +2.71 V
Analog/Digital Supply
LDO Regulator
+1.65 V to +2.71 V
Charge Pump Supply
Step-Down
Inverting
Left 1
Pseudo Diff.
Input
Right 1
Left 2
Pseudo Diff.
Input
Right 2
ALC
Multi-bit
ΔΣ ADC
Attenuator,
Boost, Mix
Beep
Mono mix,
Limiter, Bass,
Treble Adjust
Multi-bit
ΔΣ DAC
ALC HPF
Control Port Serial Audio Port
Level Shifter
+VHP
-VHP
Ground-Centered
Amplifiers
Left HP
Output
Pseudo Diff.
Input
Right HP
Output
Left Line
Output
Pseudo Diff.
Input
Right Line
Output
+1.65 V to +3.47 V
Interface Supply
I2C Control
I²S Serial Audio
Input/Output
Headphone Detect
http://www.cirrus.com
Copyright © Cirrus Logic, Inc. 2007
(All Rights Reserved)
NOVEMBER '07
DS773F1
1 page  
CS42L55www.DataSheet4U.com
6.13.4 Invert PCM Signal Polarity .................................................................................................. 51
6.13.5 Master Playback Mute ......................................................................................................... 51
6.14 ADCx Mixer Volume:
ADCA (Address 10h) & ADCB (Address 11h) ...................................................................................... 51
6.14.1 ADC Mixer Channel x Mute ................................................................................................. 51
6.14.2 ADC Mixer Channel x Volume ............................................................................................. 51
6.15 PCMx Mixer Volume:
PCMA (Address 12h) & PCMB (Address 13h) ..................................................................................... 52
6.15.1 PCM Mixer Channel x Mute ................................................................................................ 52
6.15.2 PCM Mixer Channel x Volume ............................................................................................ 52
6.16 Beep Frequency & On Time (Address 14h) ................................................................................. 53
6.16.1 Beep Frequency .................................................................................................................. 53
6.16.2 Beep On Time ..................................................................................................................... 54
6.17 Beep Volume & Off Time (Address 15h) ...................................................................................... 54
6.17.1 Beep Off Time ..................................................................................................................... 54
6.17.2 Beep Volume ....................................................................................................................... 55
6.18 Beep & Tone Configuration (Address 16h) ................................................................................... 55
6.18.1 Beep Configuration .............................................................................................................. 55
6.18.2 Treble Corner Frequency .................................................................................................... 55
6.18.3 Bass Corner Frequency ...................................................................................................... 56
6.18.4 Tone Control Enable ........................................................................................................... 56
6.19 Tone Control (Address 17h) ......................................................................................................... 56
6.19.1 Treble Gain .......................................................................................................................... 56
6.19.2 Bass Gain ............................................................................................................................ 56
6.20 Master Volume Control:
MSTA (Address 18h) & MSTB (Address 19h) ...................................................................................... 57
6.20.1 Master Volume Control ........................................................................................................ 57
6.21 Headphone Volume Control:
HPA (Address 1Ah) & HPB (Address 1Bh) .......................................................................................... 57
6.21.1 Headphone Channel x Mute ................................................................................................ 57
6.21.2 Headphone Volume Control ................................................................................................ 57
6.22 Line Volume Control:
LINEA (Address 1Ch) & LINEB (Address 1Dh) .................................................................................... 58
6.22.1 Line Channel x Mute ........................................................................................................... 58
6.22.2 Line Volume Control ............................................................................................................ 58
6.23 Analog Input Advisory Volume (Address 1Eh) ............................................................................. 59
6.23.1 Analog Input Advisory Volume ............................................................................................ 59
6.24 Digital Input Advisory Volume (Address 1Fh) ............................................................................... 59
6.24.1 Digital Input Advisory Volume ............................................................................................. 59
6.25 ADC & PCM Channel Mixer (Address 20h) .................................................................................. 60
6.25.1 PCM Mix Channel Swap ..................................................................................................... 60
6.25.2 ADC Mix Channel Swap ...................................................................................................... 60
6.26 Limiter Min/Max Thresholds (Address 21h) .................................................................................. 60
6.26.1 Limiter Maximum Threshold ................................................................................................ 60
6.26.2 Limiter Cushion Threshold .................................................................................................. 61
6.27 Limiter Control, Release Rate (Address 22h) ............................................................................... 61
6.27.1 Peak Detect and Limiter ...................................................................................................... 61
6.27.2 Peak Signal Limit All Channels ........................................................................................... 61
6.27.3 Limiter Release Rate ........................................................................................................... 62
6.28 Limiter Attack Rate (Address 23h) ................................................................................................ 62
6.28.1 Limiter Attack Rate .............................................................................................................. 62
6.29 ALC Enable & Attack Rate (Address 24h) .................................................................................... 62
6.29.1 ALCx .................................................................................................................................... 62
6.29.2 ALC Attack Rate .................................................................................................................. 63
DS773F1
5
5 Page 
3. CHARACTERISTIC AND SPECIFICATION TABLES
CS42L55www.DataSheet4U.com
RECOMMENDED OPERATING CONDITIONS
GND = AGND = 0 V, all voltages with respect to ground.
DC Power Supply
Analog
Charge Pump
LDO Regulator for Digital
Serial/Control Port Interface
Ambient Temperature
Parameters
Symbol
Commercial - CNZ
VA
VCP
VLDO
VL
TA
Min
1.65
1.65
1.65
1.65
-40
Max
2.71
VA
2.71
3.47
+85
Units
V
V
V
V
°C
ABSOLUTE MAXIMUM RATINGS
GND = AGND = 0 V; all voltages with respect to ground.
DC Power Supply
Input Current
Analog Input Voltage
Digital Input Voltage
Parameters
Symbol
Min
Analog, Charge Pump, LDO VA, VCP, VLDO
Serial/Control Port Interface
VL
-0.3
-0.3
(Note 2)
(Note 3)
(Note 3)
Iin
VIN
VIND
-
AGND-0.7
-0.3
Max
3.0
4.0
±10
VA+0.7
VL+0.4
Units
V
V
mA
V
V
Ambient Operating Temperature (power applied)
Storage Temperature
TA -50 +115 °C
Tstg -65 +150 °C
WARNING: Operation at or beyond these limits may result in permanent damage to the device. Normal operation
is not guaranteed at these extremes.
Notes:
1. Due to the existence of parasitic body diodes between VCP and VA, current flows from VCP to VA when-
ever the VA power supply is lower than VCP. This causes a “back-powering” effect on the VA power
supply rails internal to the part. Hence VA should be maintained at an equal or greater voltage than VCP
at all times. While “back-powering” does not have any adverse effects on device operation with respect
to performance and reliability, it does lead to extra power consumption and therefore should be avoided.
2. Any pin except supplies. Transient currents of up to ±100 mA on the analog input pins will not cause
SCR latch-up.
3. The maximum over/under voltage is limited by the input current.
DS773F1
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet CS42L55.PDF ] | |
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