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부품번호 PCA9530 기능
기능 2-bit I2C-bus LED dimmer
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PCA9530 데이터시트, 핀배열, 회로
PCA9530
2-bit I2C-bus LED dimmer
Rev. 03 — 26 February 2009
www.DataSheet4U.com
Product data sheet
1. General description
The PCA9530 is a 2-bit I2C-bus and SMBus I/O expander optimized for dimming LEDs in
256 discrete steps for Red/Green/Blue (RGB) color mixing and backlight applications.
The PCA9530 contains an internal oscillator with two user programmable blink rates and
duty cycles coupled to the output PWM. The LED brightness is controlled by setting the
blink rate high enough (> 100 Hz) that the blinking cannot be seen and then using the
duty cycle to vary the amount of time the LED is on and thus the average current through
the LED.
The initial setup sequence programs the two blink rates/duty cycles for each individual
PWM. From then on, only one command from the bus master is required to turn individual
LEDs ON, OFF, BLINK RATE 1 or BLINK RATE 2. Based on the programmed frequency
and duty cycle, BLINK RATE 1 and BLINK RATE 2 will cause the LEDs to appear at a
different brightness or blink at periods up to 1.69 second. The open-drain outputs directly
drive the LEDs with maximum output sink current of 25 mA per bit and 50 mA per
package.
To blink LEDs at periods greater than 1.69 second, the bus master (MCU, MPU, DSP,
chip set, etc.) must send repeated commands to turn the LED on and off as is currently
done when using normal I/O Expanders like the NXP Semiconductors PCF8574 or
PCA9554. Any bits not used for controlling the LEDs can be used for General Purpose
parallel Input/Output (GPIO) expansion which provides a simple solution when additional
I/O is needed for ACPI power switches, sensors, push buttons, alarm monitoring, fans,
etc.
The active LOW hardware reset pin (RESET) and Power-On Reset (POR) initialize the
registers to their default state causing the bits to be set HIGH (LED off).
One hardware address pin on the PCA9530 allows two devices to operate on the same
bus.
2. Features
I 2 LED drivers (on, off, flashing at a programmable rate)
I 2 selectable, fully programmable blink rates (frequency and duty cycle) between
0.591 Hz and 152 Hz (1.69 seconds and 6.58 milliseconds)
I 256 brightness steps
I Input/output not used as LED drivers can be used as regular GPIOs
I Internal oscillator requires no external components
I I2C-bus interface logic compatible with SMBus
I Internal power-on reset




PCA9530 pdf, 반도체, 판매, 대치품
NXP Semiconductors
www.DataSheet4U.com
PCA9530
2-bit I2C-bus LED dimmer
The last bit of the address byte defines the operation to be performed. When set to logic 1
a read is selected, while a logic 0 selects a write operation.
6.2 Control register
Following the successful acknowledgement of the slave address, the bus master will send
a byte to the PCA9530, which will be stored in the Control register.
0 0 0 AI 0 B2 B1 B0
Auto-Increment flag
Reset state: 00h
Fig 5. Control register
register address
002aae500
The lowest 3 bits are used as a pointer to determine which register will be accessed.
If the Auto-Increment flag is set, the three low order bits of the Control register are
automatically incremented after a read or write. This allows the user to program the
registers sequentially. The contents of these bits will rollover to ‘000’ after the last register
is accessed.
When Auto-Increment flag is set (AI = 1) and a read sequence is initiated, the sequence
must start by reading a register different from the Input register (B2 B1 B0 0 0 0).
Only the 3 least significant bits are affected by the AI flag. Unused bits must be
programmed with zeroes.
6.2.1 Control register definition
Table 3. Register summary
B2 B1 B0 Symbol
0 0 0 INPUT
0 0 1 PSC0
0 1 0 PWM0
0 1 1 PSC1
1 0 0 PWM1
1 0 1 LS0
Access
read only
read/write
read/write
read/write
read/write
read/write
Description
input register
frequency prescaler 0
PWM register 0
frequency prescaler 1
PWM register 1
LED selector
PCA9530_3
Product data sheet
Rev. 03 — 26 February 2009
© NXP B.V. 2009. All rights reserved.
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PCA9530 전자부품, 판매, 대치품
NXP Semiconductors
www.DataSheet4U.com
PCA9530
2-bit I2C-bus LED dimmer
6.6 External RESET
A reset can be accomplished by holding the RESET pin LOW for a minimum of tw(rst). The
PCA9530 registers and I2C-bus state machine will be held in their default states until the
RESET input is once again HIGH.
This input requires a pull-up resistor to VDD if no active connection is used.
7. Characteristics of the I2C-bus
The I2C-bus is for 2-way, 2-line communication between different ICs or modules. The two
lines are a serial data line (SDA) and a serial clock line (SCL). Both lines must be
connected to a positive supply via a pull-up resistor when connected to the output stages
of a device. Data transfer may be initiated only when the bus is not busy.
7.1 Bit transfer
One data bit is transferred during each clock pulse. The data on the SDA line must remain
stable during the HIGH period of the clock pulse as changes in the data line at this time
will be interpreted as control signals (see Figure 6).
SDA
SCL
Fig 6. Bit transfer
data line
stable;
data valid
change
of data
allowed
mba607
7.1.1 START and STOP conditions
Both data and clock lines remain HIGH when the bus is not busy. A HIGH-to-LOW
transition of the data line while the clock is HIGH is defined as the START condition (S). A
LOW-to-HIGH transition of the data line while the clock is HIGH is defined as the STOP
condition (P) (see Figure 7).
SDA
SCL
S
START condition
Fig 7. Definition of START and STOP conditions
P
STOP condition
mba608
PCA9530_3
Product data sheet
Rev. 03 — 26 February 2009
© NXP B.V. 2009. All rights reserved.
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