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LM3S8971 데이터시트 PDF




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LM3S8971 데이터시트, 핀배열, 회로
PRELIMINARY
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LM3S8971 Microcontroller
DATA SHEET
DS-LM3S8971-1728
Copyright © 2007 Luminary Micro, Inc.




LM3S8971 pdf, 반도체, 판매, 대치품
Table of Contents
www.DataSheet4U.com
6.1.3
6.1.4
6.1.5
6.2
6.3
6.4
7
7.1
7.2
7.2.1
7.2.2
7.2.3
7.2.4
7.2.5
7.2.6
7.2.7
7.3
7.3.1
7.3.2
7.3.3
7.3.4
7.3.5
7.4
7.5
8
8.1
8.2
8.2.1
8.2.2
8.3
8.3.1
8.3.2
8.4
8.5
8.6
9
9.1
9.1.1
9.1.2
9.1.3
9.1.4
9.1.5
9.1.6
9.2
9.3
9.4
Power Control ........................................................................................................................... 62
Clock Control ............................................................................................................................ 62
System Control ......................................................................................................................... 64
Initialization and Configuration ................................................................................................... 65
Register Map ............................................................................................................................ 65
Register Descriptions ................................................................................................................ 66
Hibernation Module .......................................................................................................... 117
Block Diagram ........................................................................................................................ 118
Functional Description ............................................................................................................. 118
Register Access Timing ........................................................................................................... 118
Clock Source .......................................................................................................................... 119
Battery Management ............................................................................................................... 119
Real-Time Clock ...................................................................................................................... 119
Non-Volatile Memory ............................................................................................................... 120
Power Control ......................................................................................................................... 120
Interrupts and Status ............................................................................................................... 120
Initialization and Configuration ................................................................................................. 121
Initialization ............................................................................................................................. 121
RTC Match Functionality (No Hibernation) ................................................................................ 121
RTC Match/Wake-Up from Hibernation ..................................................................................... 121
External Wake-Up from Hibernation .......................................................................................... 122
RTC/External Wake-Up from Hibernation .................................................................................. 122
Register Map .......................................................................................................................... 122
Register Descriptions .............................................................................................................. 123
Internal Memory ............................................................................................................... 136
Block Diagram ........................................................................................................................ 136
Functional Description ............................................................................................................. 136
SRAM Memory ........................................................................................................................ 136
Flash Memory ......................................................................................................................... 137
Flash Memory Initialization and Configuration ........................................................................... 138
Flash Programming ................................................................................................................. 138
Nonvolatile Register Programming ........................................................................................... 139
Register Map .......................................................................................................................... 139
Flash Register Descriptions (Flash Control Offset) ..................................................................... 140
Flash Register Descriptions (System Control Offset) .................................................................. 147
General-Purpose Input/Outputs (GPIOs) ....................................................................... 160
Functional Description ............................................................................................................. 160
Data Control ........................................................................................................................... 160
Interrupt Control ...................................................................................................................... 161
Mode Control .......................................................................................................................... 162
Commit Control ....................................................................................................................... 162
Pad Control ............................................................................................................................. 162
Identification ........................................................................................................................... 163
Initialization and Configuration ................................................................................................. 163
Register Map .......................................................................................................................... 164
Register Descriptions .............................................................................................................. 166
4 October 01, 2007
Preliminary

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LM3S8971 전자부품, 판매, 대치품
LM3S8971 Microcontroller
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17.2.1 Internal Reference Programming .............................................................................................. 457
17.3 Initialization and Configuration ................................................................................................. 458
17.4 Register Map .......................................................................................................................... 459
17.5 Register Descriptions .............................................................................................................. 459
18 Pulse Width Modulator (PWM) ........................................................................................ 467
18.1 Block Diagram ........................................................................................................................ 467
18.2 Functional Description ............................................................................................................. 467
18.2.1 PWM Timer ............................................................................................................................. 467
18.2.2 PWM Comparators .................................................................................................................. 468
18.2.3 PWM Signal Generator ............................................................................................................ 469
18.2.4 Dead-Band Generator ............................................................................................................. 470
18.2.5 Interrupt/ADC-Trigger Selector ................................................................................................. 470
18.2.6 Synchronization Methods ......................................................................................................... 470
18.2.7 Fault Conditions ...................................................................................................................... 471
18.2.8 Output Control Block ............................................................................................................... 471
18.3 Initialization and Configuration ................................................................................................. 471
18.4 Register Map .......................................................................................................................... 472
18.5 Register Descriptions .............................................................................................................. 474
19 Quadrature Encoder Interface (QEI) ............................................................................... 503
19.1 Block Diagram ........................................................................................................................ 503
19.2 Functional Description ............................................................................................................. 504
19.3 Initialization and Configuration ................................................................................................. 506
19.4 Register Map .......................................................................................................................... 506
19.5 Register Descriptions .............................................................................................................. 507
20 Pin Diagram ...................................................................................................................... 520
21 Signal Tables .................................................................................................................... 521
22 Operating Characteristics ............................................................................................... 534
23 Electrical Characteristics ................................................................................................ 535
23.1 DC Characteristics .................................................................................................................. 535
23.1.1 Maximum Ratings ................................................................................................................... 535
23.1.2 Recommended DC Operating Conditions .................................................................................. 535
23.1.3 On-Chip Low Drop-Out (LDO) Regulator Characteristics ............................................................ 536
23.1.4 Power Specifications ............................................................................................................... 536
23.1.5 Flash Memory Characteristics .................................................................................................. 538
23.2 AC Characteristics ................................................................................................................... 538
23.2.1 Load Conditions ...................................................................................................................... 538
23.2.2 Clocks .................................................................................................................................... 538
23.2.3 Analog-to-Digital Converter ...................................................................................................... 539
23.2.4 Analog Comparator ................................................................................................................. 540
23.2.5 Ethernet Controller .................................................................................................................. 540
23.2.6 Hibernation Module ................................................................................................................. 543
23.2.7 Synchronous Serial Interface (SSI) ........................................................................................... 544
23.2.8 JTAG and Boundary Scan ........................................................................................................ 545
23.2.9 General-Purpose I/O ............................................................................................................... 546
23.2.10 Reset ..................................................................................................................................... 547
October 01, 2007
Preliminary
7

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