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PDF PIC18F6393 Data sheet ( Hoja de datos )
| Número de pieza | PIC18F6393 | |
| Descripción | Flash Microcontrollers | |
| Fabricantes | Microchip Technology | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de PIC18F6393 (archivo pdf) en la parte inferior de esta página. Total 30 Páginas | ||
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PIC18F6393/6493/8393/8493
Data Sheet
64/80-Pin High Performance,
Flash Microcontrollers with LCD Driver,
12-Bit ADC and nanoWatt Technology
© 2009 Microchip Technology Inc.
DS39896B
1 page  
Pin Diagrams (Continued)
80-Pin TQFP
PIC18F6393/6493/8393/8493
www.DataSheet4U.com
RH2/SEG45
RH3/SEG44
LCDBIAS2
LCDBIAS1
RG0/SEG30
RG1/TX2/CK2/SEG29
RG2/RX2/DT2/SEG28
RG3/SEG27
MCLR/VPP/RG5
RG4/SEG26
VSS
VDD
RF7/SS/SEG25
RF6/AN11/SEG24
RF5/AN10/CVREF/SEG23
RF4/AN9/SEG22
RF3/AN8/SEG21
RF2/AN7/C1OUT/SEG20
RH7/SEG43
RH6/SEG42
80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61
1
2
3
4
5
6
7
8
9
10 PIC18F8393
11 PIC18F8493
12
13
14
15
16
17
18
19
20
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
44
43
42
41
21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40
RJ2/SEG34
RJ3/SEG35
RB0/INT0
RB1/INT1/SEG8
RB2/INT2/SEG9
RB3/INT3/SEG10
RB4/KBI0/SEG11
RB5/KBI1
RB6/KBI2/PGC
VSS
OSC2/CLKO/RA6
OSC1/CLKI/RA7
VDD
RB7/KBI3/PGD
RC5/SDO/SEG12
RC4/SDI/SDA
RC3/SCK/SCL
RC2/CCP1/SEG13
RJ7/SEG36
RJ6/SEG37
Note 1: RE7 is the alternate pin for CCP2 multiplexing.
© 2009 Microchip Technology Inc.
DS39896B-page 5
5 Page 
PIC18F6393/6493/8393/8493
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FIGURE 1-1:
PIC18F6X93 (64-PIN) BLOCK DIAGRAM
Table Pointer<21>
Data Bus<8>
inc/dec logic
21
20
Address Latch
Program Memory
(48/64 Kbytes)
Data Latch
88
PCLATU PCLATH
PCU PCH PCL
Program Counter
31 Level Stack
STKPTR
Data Latch
Data Memory
(3.9 Kbytes)
Address Latch
12
Data Address<12>
4
BSR
12
FSR0
FSR1
FSR2
4
Access
Bank
12
8
Table Latch
inc/dec
logic
ROM Latch
Instruction Bus <16>
IR
Address
Decode
OSC1(3)
OSC2(3)
T1OSI
T1OSO
MCLR(2)
VDD, VSS
Instruction
Decode and
Control
State Machine
Control Signals
8
PRODH PRODL
Internal
Oscillator
Block
INTRC
Oscillator
8 MHz
Oscillator
Single-Supply
Programming
In-Circuit
Debugger
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Fail-Safe
Clock Monitor
3
BITOP
8
8 x 8 Multiply
8
W
88
8
ALU<8>
8
8
Precision
Band Gap
Reference
BOR
HLVD
ADC
12-Bit
Timer0
Timer1
Timer2
Timer3
Comparators
CCP1
CCP2
MSSP
EUSART1 AUSART2
LCD
Driver
PORTA
PORTB
PORTC
PORTD
PORTE
PORTF
PORTG
RA0/AN0
RA1/AN1
RA2/AN2/VREF-/SEG16
RA3/AN3/VREF+/SEG17
RA4/T0CKI/SEG14
RA5/AN4/HLVDIN/SEG15
OSC2/CLKO(3)/RA6
OSC1/CLKI(3)/RA7
RB0/INT0
RB1/INT1/SEG8
RB2/INT2/SEG9
RB3/INT3/SEG10
RB4/KBI0/SEG11
RB5/KBI1
RB6/KBI2/PGC
RB7/KBI3/PGD
RC0/T1OSO/T13CKI
RC1/T1OSI/CCP2(1)
RC2/CCP1/SEG13
RC3/SCK/SCL
RC4/SDI/SDA
RC5/SDO/SEG12
RC6/TX1/CK1
RC7/RX1/DT1
RD7/SEG7:RD0/SEG0
LCDBIAS1
LCDBIAS2
LCDBIAS3
COM0
RE4/COM1
RE5/COM2
RE6/COM3
RE7/CCP2(1)/SEG31
RF0/AN5/SEG18
RF1/AN6/C2OUT/SEG19
RF2/AN7/C1OUT/SEG20
RF3/AN8/SEG21
RF4/AN9/SEG22
RF5/AN10/CVREF/SEG23
RF6/AN11/SEG24
RF7/SS/SEG25
RG0/SEG30
RG1/TX2/CK2/SEG29
RG2/RX2/DT2/SEG28
RG3/SEG27
RG4/SEG26
MCLR/VPP/RG5(2)
Note
1:
2:
3:
CCP2 is multiplexed with RC1 when Configuration bit, CCP2MX, is set, or RE7 when CCP2MX is not set.
RG5 is only available when MCLR functionality is disabled.
OSC1/CLKI and OSC2/CLKO are only available in select oscillator modes and when these pins are not being used as digital I/O.
For additional information, see Section 2.0 “Oscillator Configurations” of the “PIC18F6390/6490/8390/8490 Data Sheet” (DS39629).
© 2009 Microchip Technology Inc.
DS39896B-page 11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet PIC18F6393.PDF ] | |
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