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BU7839GVW 데이터시트 PDF




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부품번호 BU7839GVW 기능
기능 Digital Input Class-D Headphone Amplifier
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BU7839GVW 데이터시트, 핀배열, 회로
www.DataSheet4U.com
Headphone Amplifiers
Digital Input
Class-D Headphone Amplifier
BU7839GVW
No.10102EAT03
Description
Most suitable for long duration reproduction of digital audio because digital audio data is taken as its input and low power
consumption is realized.BU7839GVW has Stereo Audio DAC and HP amp functions for digital audio playback.
Pop sound in ramp-up period is reduced due to built-in start-up sound reduction circuit or transistor for mute.
Also, Built-in digital volume which can control L-ch & R-ch separately.
Features
1) With Stereo Audio DAC and HP amp functions
2) Most suitable for long duration reproduction of digital audio because digital audio data is
taken as its input and low power consumption is realized
3) Pop sound in ramp-up period is reduced due to built-in start-up sound reduction circuit or transistor for mute
4) Built-in digital volume which can control L-ch & R-ch separately
Immediate switching and zero cross switching for reduction of clicking sound at the time of gain change
Gain change methods of soft switching can be selected with registers
5) Sampling frequency compatible with 8kHz-48kHz
6) Compatible with master slave with built-in PLL
7) Built-in soft mute function
8) Compatible with full front and full back formats
9) Compatible with 16, 18 & 24bit formats
10) Compatible with fs=32kHz,44.1kHz,48kHz with de-emphasis function
11) 2wire CPU I/F (2 addresses selectable 33h, 36h)
Functions
Stereo Audio DAC + HPamp
2wire CPU I/F
Serial audio I//F
Interpolator
ΔΣModulator
Level Shifter
PLL
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
1/15
2010.05 - Rev.A




BU7839GVW pdf, 반도체, 판매, 대치품
BU7839GVW
Block diagram
Technical Note
www.DataSheet4U.com
MCLK
BCLK
LRCLK
SDI
DVDDIO
DVSSIO
SCL
SDA
NRST
Audio
I/F
2wire
CPU I/F
Interpolator
ΔΣ
Modulator
Interpolator
ΔΣ
Modulator
Register
Power
on/off
control
Level Shifter
Level Shifter
256fs
PLL
ADR
TEST
DVDD DVSS
REFCLK
12MHz in
Fig. 2 Block diagram
Description of each block
2wire CPU I/F
Interface with CPU, 2-wire control
Write/read possible
Device address is 2-address selectable (33h,36h) with ADR terminal
Register
This LSI is controlled all by register
Write/read by 2wire CPU I/F
Audio I/F
Compatible with three modes of full front, full back and IIS
Sampling frequency compatible with 8kHz48kHz
Interpolator,ΔΣModulator
Variable over sampling, Order-variable ΔΣ modulator
Optimum value is selected internally and automatically
Level Shifter
Level conversion in 3V series of analogue output
Built-in mute transistor for start-up sound reduction
PLL
REFCLK terminal is taken as reference clock and 256fs is created
It becomes the default setting when 12MHz is inputted to REFCLK
Please change each setting if any frequency other than 12MHz is inputted to REFCLK
MUTE_R
VDD_R
OUT_R
VSS_R
MUTE_L
VDD_L
OUT_L
VSS_L
PLLVDD
PLLCAP
DVSS
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
4/15
2010.05 - Rev.A

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BU7839GVW 전자부품, 판매, 대치품
BU7839GVW
Technical Note
www.DataSheet4U.com
Electrical Characteristic
Ta=25degree,DVDD=DVDDIO=1.5V,VDD_R=VDD_L=PLLVDD=2.8V,REFCLK=12MHz,fs=44.1kHz,f=1kHz,Load=16,
A-weight,20kHzLPF,Slave mode
Parameter
Symbol
MIN
Limits
TYP
MAX
Unit
Condition
Static consumption current DVDD
IDDst
-
- 10 µA At the time of standby
Static consumption current
VDD_R+VDD_L
ICCst
-
- 10 µA At the time of standby
Static consumption current PLLVDD
IPLLst
-
- 10 µA At the time of standby
Consumption current DVDD
IDD
-
0.6
2.0
mA
At the time of 0.1mW output
(in slave mode)
Consumption current VDD_R+VDD_L ICC
- 2.0 6.0 mA At the time of 0.1mW output
Consumption current PLL
Output amplitude error
Channel-to-channel gain error
IPLL - 0.8 2.5 mA
Errors with reference to
Vout
-2
-
2 dB standard values at the time of
0dBFS output are as follows
Gerr
-1
-
1 dB Lch-Rch
S/N SN 60 80 - dB 0dBFS, A-Weight
THD+N
THD -40 -60
- dB -3dBFS, A-Weight
Channel-to-channel isolation
Iso 65 80 - dB 0dBFS, 1kHz BPF
PSRR
Psrr - 0 - dB
<S/N measuring method>
Measure the level ratio of the respective integral values of the signals and noise within the band of 20kHzLPF +A-Weight.
<THD+N measuring method>
Measure the level ratio of the total harmonic component + (plus) noise and the basic wave frequency component within the
band of 20kHzLPF +A-Weight.
Output amplitude error
Output amplitude is determined by the equivalent series resistance of external coil. Let Lr, VDD and Z respectively stand
for the equivalent series resistance, the power supply voltage value of VDD_R,VDD_L and the load impedance, the
standard value of output amplitude becomes the following equation:
Standard value of output amplitude [Vpp] = VDD x 0.5 x Z / ( Lr + Z + 2 )
OUT_R
OUT_L
220uF
Level Shifter
LrΩ 100uH
0.1uF
(16Ω)
Shown in the following table is the standard values of output amplitude if VDD=2.8V, Load impedance Z=16,
and Equivalent series resistance is 0.7, 4or 7.
Equivalent series
resistance []
0.0
Standard value of
output amplitude [Vpp]
1.24
Standard value of
output amplitude [dBv]
-7.13
Output power
[mW]
12.10
0.7
1.20
-7.46
11.21
4.0 1.02 -8.87 8.10
7.0 0.90 -9.98 6.27
www.rohm.com
© 2010 ROHM Co., Ltd. All rights reserved.
7/15
2010.05 - Rev.A

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부품번호상세설명 및 기능제조사
BU7839GVW

Digital Input Class-D Headphone Amplifier

ROHM Semiconductor
ROHM Semiconductor

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