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CAT9532 데이터시트 PDF




ON Semiconductor에서 제조한 전자 부품 CAT9532은 전자 산업 및 응용 분야에서
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부품번호 CAT9532 기능
기능 16-bit Programmable LED Dimmer
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CAT9532 데이터시트, 핀배열, 회로
CAT9532
16-bit Programmable LED
Dimmer with I2C Interface
Description
The CAT9532 is a CMOS device that provides 16−bit parallel
input/output port expander optimized for LED dimming control. The
CAT9532 outputs can drive directly 16 LEDs in parallel. Each
individual LED may be turned ON, OFF, or blinking at one of two
programmable rates. The device provides a simple solution for
dimming LEDs in 256 brightness steps for backlight and color mixing
applications. The CAT9532 is suitable in I2C and SMBus compatible
applications where it is necessary to limit the bus traffic or free−up the
bus master’s timer.
The CAT9532 contains an internal oscillator and two PWM signals
that drive the LED outputs. The user can program the period and duty
cycle for each individual PWM signal. After the initial set−up
command to program the Blink Rate 1 and Blink Rate 2 (frequency
and duty cycle), only one command from the bus master is required to
turn each individual open drain output ON, OFF, or cycle at Blink
Rate 1 or Blink Rate 2. Each open drain LED output can provide a
maximum output current of 25 mA. The total current sunk by all I/Os
must not exceed 400 mA.
Features
16 LED Drivers with Dimming Control
256 Brightness Steps
16 Open Drain Outputs Drive 25 mA Each
2 Selectable Programmable Blink Rates:
– Frequency: 0.593 Hz to 152 Hz
– Duty Cycle: 0% to 99.6%
I/Os can be Used as GPIOs
400 kHz I2C Bus Compatible
2.3 V to 5.5 V Operation
5 V Tolerant I/Os
Active Low Reset Input
24−Lead TSSOP and 24−pad TQFN (4 x 4 mm) Packages
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
Applications
Backlighting
RGB Color Mixing
Sensors Control
Power Switches, Push−buttons
Alarm Systems
www.onsemi.com
TSSOP−24
Y SUFFIX
CASE 948AR
TQFN−24
HV6 SUFFIX
CASE 510AG
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
© Semiconductor Components Industries, LLC, 2016
October, 2016 − Rev. 5
1
Publication Order Number:
CAT9532/D




CAT9532 pdf, 반도체, 판매, 대치품
CAT9532
Table 3. D.C. OPERATING CHARACTERISTICS (VCC = 2.3 to 5.5 V, VSS = 0 V; TA = −40°C to +85°C, unless otherwise specified)
Symbol
Parameter
Conditions
Min Typ Max Unit
SUPPLIES
VCC
ICC
Istb
ΔIstb
Supply Voltage
Supply Current
Standby Current
Additional Standby Current
Operating mode; VCC = 5.5 V; no load;
fSCL = 100 kHz
Standby mode; VCC = 5.5 V; no load;
VI = VSS or VCC, fSCL = 0 kHz
Standby mode; VCC = 5.5 V; every
LED I/O = VIN = 4.3 V, fSCL = 0 kHz
2.3 − 5.5 V
250 550
mA
2.1 5.0
mA
− − 2 mA
VPOR (Note 1) Power−on Reset Voltage
VCC = 3.3 V, No load;
VI = VCC or VSS
− 1.5 2.2 V
SCL, SDA
VIL (Note 2)
VIH (Note 2)
IOL
IIL
CI (Note 3)
CO (Note 3)
A0, A1, A2
Low Level Input Voltage
High Level Input Voltage
Low Level Output Current
Leakage Current
Input Capacitance
Output Capacitance
VOL = 0.4 V
VI = VCC = VSS
VI = VSS
VO = VSS
−0.3
− 0.3 VCC V
0.7 VCC
5.5
V
3 − − mA
−1 − +1 mA
− − 6 pF
− − 8 pF
VIL (Note 2)
VIH (Note 2)
IIL
I/Os
Low Level Input Voltage
High Level Input Voltage
Input Leakage Current
−0.3 − 0.8 V
2.0 − 5.5 V
−1 − 1 mA
VIL (Note 2)
VIH (Note 2)
IOL (Note 4)
Low Level Input Voltage
High Level Input Voltage
Low Level Output Current
IIL
CI/O (Note 3)
RESET
Input Leakage Current
Input/Output Capacitance
VOL = 0.4 V; VCC = 2.3 V
VOL = 0.4 V; VCC = 3.0 V
VOL = 0.4 V; VCC = 5.0 V
VOL = 0.7 V; VCC = 2.3 V
VOL = 0.7 V; VCC = 3.0 V
VOL = 0.7 V; VCC = 5.0 V
VCC = 3.6 V; VI = VSS or VCC
−0.3 − 0.8 V
2.0 − 5.5 V
9 − − mA
12 − −
15 − −
15 − −
20 − −
25 − −
−1 − 1 mA
− − 8 pF
VIL (Note 2) Low Level Input Voltage
−0.3
− 0.2 VCC V
VIH (Note 2) High Level Input Voltage
0.7 VCC
5.5
V
IIL Input Leakage Current VI = VCC or VSS
−1 − 1 mA
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
1. VCC must be lowered to 0.2 V in order to reset the device.
2. VIL min and VIH max are reference values only and are not tested.
3. This parameter is characterized initially and after a design or process change that affects the parameter. Not 100% tested.
4. The output current must be limited to a maximum 25 mA per each I/O; the total current sunk by all I/O must be limited to 400 mA.
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CAT9532 전자부품, 판매, 대치품
CAT9532
Acknowledge
After a successful data transfer, each receiving device is
required to generate an acknowledge. The acknowledging
device pulls down the SDA line during the ninth clock cycle,
signaling that it received the 8 bits of data. The SDA line
remains stable LOW during the HIGH period of the
acknowledge related clock pulse (Figure 7).
The CAT9532 responds with an acknowledge after
receiving a START condition and its slave address. If the
device has been selected along with a write operation, it
responds with an acknowledge after receiving each 8− bit
byte.
When the CAT9532 begins a READ mode it transmits 8
bits of data, releases the SDA line, and monitors the line for
an acknowledge. Once it receives this acknowledge, the
CAT9532 will continue to transmit data. If no acknowledge
is sent by the Master, the device terminates data transmission
and waits for a STOP condition. The master must then issue
a stop condition to return the CAT9532 to the standby power
mode and place the device in a known state.
Registers and Bus Transactions
After the successful acknowledgement of the slave
address, the bus master will send a command byte to the
CAT9532 which will be stored in the Control Register. The
format of the Control Register is shown in Figure 8.
The Control Register acts as a pointer to determine which
register will be written or read. The four least significant
bits, B0, B1, B2, B3, are used to select which internal
register is accessed, according to the Table 6.
If the auto increment flag (AI) is set, the four least
significant bits of the Control Register are automatically
incremented after a read or write operation. This allows the
user to access the CAT9532 internal registers sequentially.
The content of these bits will rollover to “0000” after the last
register is accessed.
Table 6. INTERNAL REGISTERS SELECTION
B3 B2 B1 B0
Register Name
0000
INPUT0
0001
INPUT1
0010
PSC0
0011
PWM0
0100
PSC1
0101
PWM1
0110
LS0
0111
LS1
1000
LS2
1001
LS3
Type
READ
READ
READ/WRITE
READ/WRITE
READ/WRITE
READ/WRITE
READ/WRITE
READ/WRITE
READ/WRITE
READ/WRITE
Register Function
Input Register 0
Input Register 1
Frequency Prescaler 0
PWM Register 0
Frequency Prescaler 1
PWM Register 1
LED 0−3 Selector
LED 4−7 Selector
LED 8−11 Selector
LED 12−15 Selector
SCL FROM
MASTER
1
89
DATA OUTPUT
FROM TRANSMITTER
DATA OUTPUT
FROM RECEIVER
START
Figure 7. Acknowledge Timing
ACKNOWLEDGE
0 0 0 AI B3 B2 B1 B0
RESET STATE: 00h
REGISTER ADDRESS
AUTO−INCREMENT FLAG
Figure 8. Control Register
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