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PDF LP3995ILD-1.9 Data sheet ( Hoja de datos )
| Número de pieza | LP3995ILD-1.9 | |
| Descripción | Micropower 150mA CMOS Voltage Regulator with Active Shutdown | |
| Fabricantes | National Semiconductor | |
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August 2004
LP3995
Micropower 150mA CMOS Voltage Regulator with Active
Shutdown
General Description
The LP3995 linear regulator is designed to meet the require-
ments of portable battery-powered applications and will pro-
vide an accurate output voltage with low noise and low
quiescent current. Ideally suited for powering RF/Analog
devices, this device will also be used to meet more general
circuit needs in which a fast turn-off is essential.
For battery powered applications the low dropout and low
ground current provided by the device allows the lifetime of
the battery to be maximized. The Enable(/Disable) control
allows the system to further extend the battery lifetime by
reducing the power consumption to virtually zero.
The Enable(/Disable) function on the device incorporates an
active discharge circuit on the output for faster device shut-
down. Where the fast turn-off is not required the LP3999
linear regulator is recommended.
The LP3995 also features internal protection against short-
circuit currents and over-temperature conditions.
The LP3995 is designed to be stable with small 1.0 µF
ceramic capacitors. The small outline of the LP3995 micro
SMD package with the required ceramic capacitors can
realize a system application within minimal board area.
Performance is specified for a −40˚C to +125˚C temperature
range.
The device is available in micro SMD package and LLP
package. For other package options contact your local NSC
sales office.
The device is available in fixed output voltages in the ranges
1.5V to 3.3V. For availability, please contact your local NSC
sales office.
Key Specifications
n 2.5V to 6.0V Input Range
n Accurate Output Voltage; ±75mV / 2%
n 60 mV Typical Dropout with 150 mA Load
n Virtually Zero Quiescent Current when Disabled
n Low Output Voltage Noise
n Stable with a 1 µF Output Capacitor
n Guaranteed 150 mA Output Current
n Fast Turn-on; 30 µs (Typ.)
n Fast Turn-off; 175 µs (Typ.)
Features
n 5 pin micro SMD Package
n 6 pin LLP Package
n Stable with Ceramic Capacitor
n Logic Controlled Enable
n Fast Turn-on
n Active Disable for Fast Turn-off.
n Thermal-overload and Short-circuit Protection
n −40 to +125˚C Junction Temperature Range for
Operation
Applications
n GSM Portable Phones
n CDMA Cellular Handsets
n Wideband CDMA Cellular Handsets
n Bluetooth Devices
n Portable Information Appliances
Typical Application Circuit
© 2004 National Semiconductor Corporation DS200349
20034901
www.national.com
1 page  
Absolute Maximum Ratings
(Notes 3, 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Input Voltage (VIN)
Output Voltage
Enable Input Voltage
Junction Temperature
Lead/Pad Temperature
(Note 5)
micro SMD
LLP
Storage Temperature
Continuous Power
Dissipation(Note 7)
ESD (Note 9)
Human Body Model
Machine Model
−0.3 to 6.5V
−0.3 to (VIN + 0.3V)
to 6.5V (max)
−0.3 to 6.5V
150˚C
260˚C
235˚C
−65 to +150˚C
Internally Limited
2 kV
200V
Operating Ratings (Note 3)
Input Voltage (VIN)
Enable Input Voltage
Junction Temperature
Ambient Temperature
Range(Note 7)
2.5 to 6.0V
0 to 6.0V
−40 to +125˚C
-40 to 85˚C
Thermal Properties(Note 8)
Junction to Ambient Thermal
Resistance
θJA (LLP pkg.)
θJA (micro SMD pkg.)
88˚C/W
255˚C/W
Electrical Characteristics
Unless otherwise noted, VEN = 1.5, VIN = VOUT + 1.0V, CIN = 1 µF, IOUT = 1 mA, COUT = 1 µF, cBP = 0.01 µF. Typical values
and limits appearing in normal type apply for TJ = 25˚C. Limits appearing in boldface type apply over the full temperature
range for operation, −40 to +125˚C. (Notes 14, 15)
Symbol
Parameter
Conditions
Typical
Limit
Min Max
Units
VIN Input Voltage
DEVICE OUTPUT: 1.5 ≤ VOUT < 1.8V
∆VOUT
Output Voltage Tolerance
IOUT = 1 mA
2.5 6.0
V
-50 50
mV
-75 75
Line Regulation Error
micro SMD
Load Regulation Error
VIN = (VOUT(NOM)+1.0V) to 6.0V,
IOUT = 1 mA
-3.5 3.5 mV/V
IOUT = 1 mA to 150 mA
10
µV/mA
75
LLP
Load Regulation Error
IOUT = 1 mA to 150 mA
70
µV/mA
125
PSRR
Power Supply Rejection Ratio
(Note 11)
DEVICE OUTPUT: 1.8 ≤ VOUT < 2.5V
∆VOUT
Output Voltage Tolerance
f = 1 kHz, IOUT = 1 mA
f = 10 kHz, IOUT = 1 mA
IOUT = 1 mA
55
dB
53
-50 50
mV
−75 75
microSMDLine Regulation Error
LLP
Line Regulation Error
micro SMD
Load Regulation Error
VIN = (VOUT(NOM)+1.0V) to 6.0V,
IOUT = 1 mA
VIN = (VOUT(NOM)+1.0V) to 6.0V,
IOUT = 1 mA
IOUT = 1 mA to 150 mA
10
−2.5
−3.5
2.5 mV/V
3.5 mV/V
µV/mA
75
LLP
Load Regulation Error
IOUT = 1 mA to 150 mA
80
µV/mA
125
PSRR
Power Supply Rejection Ratio
(Note 11)
f = 1 kHz, IOUT = 1 mA
f = 10 kHz, IOUT = 1 mA
55
50
dB
5 www.national.com
5 Page 
Application Hints
POWER DISSIPATION AND DEVICE OPERATION
The permissible power dissipation for any package is a
measure of the capability of the device to pass heat from the
power source, the junctions of the IC, to the ultimate heat
sink, the ambient environment. Thus the power dissipation is
dependent on the ambient temperature and the thermal
resistance across the various interfaces between the die and
ambient air.
The Thermal Resistance figure
Re-stating the equation in (Note 7) in the electrical specifi-
cation section, the allowable power dissipation for the device
in a given package can be calculated:
With a θJA = 255˚C/W, the device in the micro SMD package
returns a value of 392 mW with a maximum junction tem-
perature of 125˚C.
With a θJA = 88˚C/W, the device in the LLP package returns
a value of 1.136 mW with a maximum junction temperature
of 125˚C.
The actual power dissipation across the device can be rep-
resented by the following equation:
PD = (VIN − VOUT) x IOUT.
This establishes the relationship between the power dissipa-
tion allowed due to thermal consideration, the voltage drop
across the device, and the continuous current capability of
the device. These two equations should be used to deter-
mine the optimum operating conditions for the device in the
application.
EXTERNAL CAPACITORS
In common with most regulators, the LP3995 requires exter-
nal capacitors to ensure stable operation. The LP3995 is
specifically designed for portable applications requiring mini-
mum board space and smallest components. These capaci-
tors must be correctly selected for good performance.
INPUT CAPACITOR
An input capacitor is required for stability. It is recommended
that a 1.0 µF capacitor be connected between the LP3995
input pin and ground (this capacitance value may be in-
creased without limit).
This capacitor must be located a distance of not more than
1 cm from the input pin and returned to a clean analogue
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important: Tantalum capacitors can suffer catastrophic fail-
ures due to surge current when connected to a low-
impedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application.
There are no requirements for the ESR (Equivalent Series
Resistance) on the input capacitor, but tolerance and tem-
perature coefficient must be considered when selecting the
capacitor to ensure the capacitance will remain ≅ 1.0 µF over
the entire operating temperature range.
OUTPUT CAPACITOR
The LP3995 is designed specifically to work with very small
ceramic output capacitors. A ceramic capacitor (dielectric
types Z5U, Y5V or X7R) in the 1.0 [to 10 µF] range, and with
ESR between 5 mΩ to 500 mΩ, is suitable in the LP3995
application circuit.
For this device the output capacitor should be connected
between the VOUT pin and ground.
It may also be possible to use tantalum or film capacitors at
the device output, VOUT, but these are not as attractive for
reasons of size and cost (see the section Capacitor Charac-
teristics).
The output capacitor must meet the requirement for the
minimum value of capacitance and also have an ESR value
that is within the range 5 mΩ to 500 mΩ for stability.
NO-LOAD STABILITY
The LP3995 will remain stable and in regulation with no
external load. This is an important consideration in some
circuits, for example CMOS RAM keep-alive applications.
CAPACITOR CHARACTERISTICS
The LP3995 is designed to work with ceramic capacitors on
the output to take advantage of the benefits they offer. For
capacitance values in the range of 1 µF to 4.7 µF, ceramic
capacitors are the smallest, least expensive and have the
lowest ESR values, thus making them best for eliminating
high frequency noise. The ESR of a typical 1 µF ceramic
capacitor is in the range of 20 mΩ to 40 mΩ, which easily
meets the ESR requirement for stability for the LP3995.
The temperature performance of ceramic capacitors varies
by type. Most large value ceramic capacitors ( ≥ 2.2 µF) are
manufactured with Z5U or Y5V temperature characteristics,
which results in the capacitance dropping by more than 50%
as the temperature goes from 25˚C to 85˚C.
A better choice for temperature coefficient in a ceramic
capacitor is X7R. This type of capacitor is the most stable
and holds the capacitance within ±15% over the tempera-
ture range. Tantalum capacitors are less desirable than ce-
ramic for use as output capacitors because they are more
expensive when comparing equivalent capacitance and volt-
age ratings in the 1 µF to 4.7 µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
have to be larger in capacitance (which means bigger and
more costly) than a ceramic capacitor with the same ESR
value. It should also be noted that the ESR of a typical
tantalum will increase about 2:1 as the temperature goes
from 25˚C down to −40˚C, so some guard band must be
allowed.
NOISE BYPASS CAPACITOR
A bypass capacitor should be connected between the CBP
pin and ground to significantly reduce the noise at the regu-
lator output. This device pin connects directly to a high
impedance node within the bandgap reference circuitry. Any
significant loading on this node will cause a change on the
regulated output voltage. For this reason, DC leakage cur-
rent through this pin must be kept as low as possible for best
output voltage accuracy.
The use of a 0.01uF bypass capacitor is strongly recom-
mended to prevent overshoot on the output during start-up.
11 www.national.com
11 Page | ||
| Páginas | Total 14 Páginas | |
| PDF Descargar | [ Datasheet LP3995ILD-1.9.PDF ] | |
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