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56F8037 데이터시트 PDF




Freescale Semiconductor에서 제조한 전자 부품 56F8037은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 56F8037 자료 제공

부품번호 56F8037 기능
기능 16-bit Digital Signal Controllers
제조업체 Freescale Semiconductor
로고 Freescale Semiconductor 로고


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56F8037 데이터시트, 핀배열, 회로
www.DataSheet4U.com
56F8037/56F8027
Data Sheet
Technical Data
56F8000
16-bit Digital Signal Controllers
MC56F8037
Rev. 6
02/2010
freescale.com




56F8037 pdf, 반도체, 판매, 대치품
56F8037/56F8027 General Description
www.DataSheet4U.com
• Up to 32 MIPS at 32MHz core frequency
• DSP and MCU functionality in a unified,
C-efficient architecture
• 56F8037 offers 64KB (32K x 16) Program Flash
• 56F8027 offers 32KB (16K x 16) Program Flash
• 56F8037 offers 8KB (4K x 16) Unified Data/Program
RAM
• 56F8027 offers 4KB (2K x 16) Unified Data/Program
RAM
• One 6-channel PWM module
• Two 8-channel 12-bit Analog-to-Digital Converters
(ADCs)
• Two 12-bit Digital-to-Analog Converters (DACs)
• Two Analog Comparators
• Three Programmable Interval Timers (PITs)
• Two Queued Serial Communication Interfaces (QSCIs)
with LIN slave functionality
• Two Queued Serial Peripheral Interfaces (QSPIs)
• Freescale’s scalable controller area network (MSCAN)
2.0 A/B Module
• Two 16-bit Quad Timers
• One Inter-Integrated Circuit (I2C) port
• Computer Operating Properly (COP)/Watchdog
• On-Chip Relaxation Oscillator
• Integrated Power-On Reset (POR) and Low-Voltage
Interrupt (LVI) module
• JTAG/Enhanced On-Chip Emulation (OnCE™) for
unobtrusive, real-time debugging
RESET or
GPIOA
4
VCAP VDD
23
VSS
4
VDDA VSSA
PWM
14 or TMRA or TMRB
or CMP or QSPI1
or GPIOA
2 DAC
JTAG/EOnCE
Port or
GPIOD
Digital Reg Analog Reg
16-Bit
56800E Core
Low-Voltage
Supervisor
Program Controller
and Hardware
Looping Unit
Address
Generation Unit
Data ALU
16 x 16 + 36 -> 36-Bit MAC
Three 16-bit Input Registers
Four 36-bit Accumulators
Bit
Manipulation
Unit
or GPIOD
PAB
PDB
CDBR
8 AD0
ADC
Memory
CDBW
R/W Control
or CMP
or QSCI1
or GPIOC
8 AD1
Program Memory
32K x 16 Flash
16K x 16 Flash
Unified Data /
Program RAM
4K x 16
XDB2
XAB1
XAB2
PAB
PDB
CDBR
System Bus
Control
2K x 16
CDBW
Programmable
Interval
Timer
IPBus Bridge (IPBB)
I2C
or CAN
or TMRB
or CMP
or GPIOB
6
QSPI0
or PWM
or I2C
or TMRA
or GPIOB
4
QSCI0
or PWM
or I2C
or QSPI1
or TMRA
or TMRB
or GPIOB
4
COP/
Watchdog
Interrupt
Controller
System
Integration
Module
P
O
R
Clock
Generator*
O
S
C
*Includes On-Chip
Relaxation Oscillator
56F8037/56F8027 Block Diagram
XTAL, CLKIN, or
GPIOD
EXTAL or GPIOD
56F8037/56F8027 Data Sheet, Rev. 6
4 Freescale Semiconductor

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56F8037 전자부품, 판매, 대치품
56F80w37w/w56.DFa8t0aS2h7eeFte4Uat.ucorems
1.1.4 Peripheral Circuits for 56F8037/56F8027
• One multi-function six-output Pulse Width Modulator (PWM) module
— Up to 96MHz PWM operating clock
— 15 bits of resolution
— Center-aligned and Edge-aligned PWM signal mode
— Four programmable fault inputs with programmable digital filter
— Double-buffered PWM registers
— Each complementary PWM signal pair allows selection of a PWM supply source from:
– PWM generator
– External GPIO
– Internal timers
– Analog comparator outputs
– ADC conversion result which compares with values of ADC high- and low-limit registers to set
PWM output
• Two independent 12-bit Analog-to-Digital Converters (ADCs)
— 2 x 8 channel inputs
— Supports both simultaneous and sequential conversions
— ADC conversions can be synchronized by both PWM and timer modules
— Sampling rate up to 2.67MSPS
— 16-word result buffer registers
• Two 12-bit Digital-to-Analog Converters (DACs)
— 2 microsecond settling time when output swing from rail to rail
— Automatic waveform generation generates square, triangle and sawtooth waveforms with
programmable period, update rate, and range
• Two 16-bit multi-purpose Quad Timer modules (TMRs)
— Up to 96MHz operating clock
— Eight independent 16-bit counter/timers with cascading capability
— Each timer has capture and compare capability
— Up to 12 operating modes
• Two Queued Serial Communication Interfaces (QSCIs) with LIN Slave functionality
— Full-duplex or single-wire operation
— Two receiver wake-up methods:
– Idle line
– Address mark
— Four-bytes-deep FIFOs are available on both transmitter and receiver
• Two Queued Serial Peripheral Interfaces (QSPIs)
Freescale Semiconductor
56F8037/56F8027 Data Sheet, Rev. 6
7

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