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AD5757 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 AD5757은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


PDF 형식의 AD5757 자료 제공

부품번호 AD5757 기능
기능 Quad Channel 16-Bit Serial Input - 4-20mA Output DAC Dynamic Power Control : HART Connectivity
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AD5757 데이터시트, 핀배열, 회로
Preliminary Technical Data
FEATURES
16/12-Bit Resolution and Monotonicity
Dynamic Power Control for Thermal Management
IOUT Range: 0mA-20mA, 4mA–20mA or 0mA–24mA
±0.05% Total Unadjusted Error (TUE) Max
User programmable Offset and Gain
On Chip Diagnostics
On-Chip Reference (±5 ppm/°C Max)
−40°C to +105°C Temperature Range
APPLICATIONS
Process Control
Actuator Control
PLC’s
HART Network Connectivity
PRODUCT HIGHLIGHTS
Dynamic Power Control for Thermal management
16bit performance
Multi-channel
HART Compliant
Quad Cwhwwa.DnantaeShle,et41U6.co-mBit,
Serial Input, 4-20mA Output DAC,
Dynamic Power Control, HART Connectivity
AD5757/AD5737
GENERAL DESCRIPTION
The AD5757/AD5737 is a quad, current output DAC, which
operates with a power supply of up to +33v. On chip dynamic
power control minimizes package power dissipation in current
mode. This is achieved by regulating the voltage on the output
driver from between 7V-30V.
Each channel has a corresponding CHART pin so that HART
signals can be coupled onto the AD5757/AD5737’s current
output.
The part uses a versatile 3-wire serial interface that operates at
clock rates up to 30 MHz and that is compatible with standard
SPI®, QSPI™, MICROWIRE™, DSP and microcontroller
interface standards. The interface also features optional CRC-8
packet error checking as well as a watchdog timer that monitors
activity on the interface.
Table 1. Complementary Devices
Part No.
Description
ADR445
5V, Ultralow Noise, LDO XFET Voltage
Reference with Current Sink and Source
ADP1871
Synchronous Buck Controller with Constant
On-Time, Valley Current Mode, and Power
Save Mode
Figure 1.
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.




AD5757 pdf, 반도체, 판매, 대치품
AD5757/AD5737
Preliminary Technical Datawww.DataSheet4U.com
Parameter1
OUTPUT CHARACTERISTICS2
Current Loop Compliance Voltage
Min
Output Current Drift vs. Time
Resistive Load
Inductive Load
DC PSRR
Output Impedance
REFERENCE INPUT/OUTPUT
Reference Input2
Reference Input Voltage
DC Input Impedance
Reference Output
Output Voltage
Reference TC23
Output Noise (0.1 Hz to 10 Hz) 2
Noise Spectral Density2
Output Voltage Drift vs. Time2
4.95
5
4.998
-10
Capacitive Load2
Load Current
Short Circuit Current
Line Regulation2
Load Regulation2
Thermal Hysteresis2
DC-DC
SWITCH
SWITCH On Resistance
SWITCH Leakage Current
Peak Current Limit
OSCILLATOR
Oscillator Frequency
Maximum Duty Cycle
DIGITAL INPUTS2
VIH, Input High Voltage
VIL, Input Low Voltage
Input Current
Pin Capacitance
DIGITAL OUTPUTS2
SDO, ALERT
TBD
2
−1
Typ Max
Unit
TBD AVDD - V max
2.5
±TB ppm FSR
D
±TB ppm FSR
D
See Ω max
Com
men
t
See H max
Com
men
t
TBD µA/V
TBD µA/V
50 MΩ
Test Conditions/Comments
Drift after 500 hours, TJ = 150°C
(this is included in the TUE specifications)
Drift after 1000 hours, TJ = 150°C
(this is included in the TUE specifications)
Chosen such that compliance is not exceeded. Plus
see graph on load vs AVcc and DCDC switching freq.
Will need appropriate cap at higher inductance values.
See Page X of Datasheet.
5 5.05
TBD
5 5.002
±5 10
TBD
TBD
±TB
D
±TB
D
TBD
5
7
10
TBD
TBD
V nom
MΩ min
For specified performance
V
ppm/°C
µV p-p typ
nV/√Hz typ
ppm
ppm
nF
mA
mA
ppm/V
ppm/mA
ppm
TA = 25°C
At 10 kHz
Drift after 500 hours, TJ = 150°C
Drift after 1000 hours, TJ = 150°C
0.5
TBD
0.8
TBD TBD
TBD
0.8
+1
10
ohm
uA
A
KHz
%
V
V
µA
pF
VIN=TBD, IOUT=TBD, RLOAD=TBD
JEDEC compliant
Per pin
Per pin
Rev. PrD | Page 4 of 31

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AD5757 전자부품, 판매, 대치품
Preliminary Technical Data
SCLK
SYNC
SDIN
LDAC
VOUT
LDAC = 0
1
t6
t4
2
t7
MSB
t3
t8
t1
t2
24
t5
LSB
t10
t17
VOUT
CLEAR
VOUT
t13
t14
t19
t10
t9
t11
t12
t16
AD5757/AD5737www.DataSheet4U.com
t12
ALERT
RESET
FAULT
t18
Figure 2. Serial Interface Timing Diagram
Rev. PrD | Page 7 of 31

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