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PDF AD5737 Data sheet ( Hoja de datos )

Número de pieza AD5737
Descripción Quad Channel 16-Bit Serial Input - 4-20mA Output DAC Dynamic Power Control : HART Connectivity
Fabricantes Analog Devices 
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Preliminary Technical Data
FEATURES
16/12-Bit Resolution and Monotonicity
Dynamic Power Control for Thermal Management
IOUT Range: 0mA-20mA, 4mA–20mA or 0mA–24mA
±0.05% Total Unadjusted Error (TUE) Max
User programmable Offset and Gain
On Chip Diagnostics
On-Chip Reference (±5 ppm/°C Max)
−40°C to +105°C Temperature Range
APPLICATIONS
Process Control
Actuator Control
PLC’s
HART Network Connectivity
PRODUCT HIGHLIGHTS
Dynamic Power Control for Thermal management
16bit performance
Multi-channel
HART Compliant
Quad Cwhwwa.DnantaeShle,et41U6.co-mBit,
Serial Input, 4-20mA Output DAC,
Dynamic Power Control, HART Connectivity
AD5757/AD5737
GENERAL DESCRIPTION
The AD5757/AD5737 is a quad, current output DAC, which
operates with a power supply of up to +33v. On chip dynamic
power control minimizes package power dissipation in current
mode. This is achieved by regulating the voltage on the output
driver from between 7V-30V.
Each channel has a corresponding CHART pin so that HART
signals can be coupled onto the AD5757/AD5737’s current
output.
The part uses a versatile 3-wire serial interface that operates at
clock rates up to 30 MHz and that is compatible with standard
SPI®, QSPI™, MICROWIRE™, DSP and microcontroller
interface standards. The interface also features optional CRC-8
packet error checking as well as a watchdog timer that monitors
activity on the interface.
Table 1. Complementary Devices
Part No.
Description
ADR445
5V, Ultralow Noise, LDO XFET Voltage
Reference with Current Sink and Source
ADP1871
Synchronous Buck Controller with Constant
On-Time, Valley Current Mode, and Power
Save Mode
Figure 1.
Rev. PrD
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.

1 page




AD5737 pdf
Preliminary Technical Data
AD5757/AD5737www.DataSheet4U.com
Parameter1
VOL, Output Low Voltage
VOH, Output High Voltage
High Impedance Leakage
Current
High Impedance Output
Capacitance
FAULT
VOL, Output Low Voltage
VOL, Output Low Voltage
VOH, Output High Voltage
POWER REQUIREMENTS
AVDD
AVSS
DVDD, AVCC
Input Voltage
AIDD
AISS
DICC
AIcc
Power Dissipation
Min
DVDD
−0.5
−1
Typ Max
0.4
+1
5
Unit
V
V
µA
pF
3.6
12
−26.4
2.7
0.4
0.6
V
V
V
33
−10.8/
0
V
V
5.5
TBD
TBD
TBD
TBD
TBD
TBD
TBD
V
mA
mA
mA
mA
mW
mW
mW
Test Conditions/Comments
sinking 200 µA
sourcing 200 µA
10kpull-up resistor to DVDD
At 2.5 mA
10kpull-up resistor to DVDD
AVss can be tied to AGND
Output unloaded
Bipolar Supply Mode only, outputs unloaded
VIH = DVDD, VIL = GND
DCDC ’s not enabled
AVDD = 33V, AVSS = 0V, outputs unloaded
AVDD = 33V, AVSS = -26.4 V, outputs unloaded
AVDD = 15V, AVSS = -15 V, outputs unloaded
1Temperature range: −40°C to +105°C; typical at +25°C.
2 Guaranteed by design and characterization; not production tested.
3 The on-chip reference is production trimmed and tested at 25°C and 85°C. It is characterized from −40°C to +105°C.
AC PERFORMANCE CHARACTERISTICS
AVDD = 15V, AVSS = 0V/-15 V, VBOOSTA,B,C,D = +10.8 V to +33 V, DVDD = AVCC = 2.7 V to 5.5 V, DCDC disabled, AGND = DGND =
GNDSWA,B,C,D = 0 V, REFIN= +5, VOUT : RL = 1kΩ, CL = 220pF, IOUT : RL = 300, all specifications TMIN to TMAX unless otherwise noted.
Table 3.
Parameter1
Min Typ Max
DYNAMIC PERFORMANCE
Current Output
Output Current Settling Time
TBD TBD
-
Output Noise (0.1 Hz to 10 Hz
Bandwidth)
0.1
Output Noise (100 kHz Bandwidth)
80
Output Noise Spectral Density
TBD
Slew Rate
TBD
TBD
Unit Test Conditions/Comments
µs typ
ms typ
LSB p-p
To 0.1% FSR
See Figure 7 and Figure 8
(16-Bit LSB)
µV rms
nV/√Hz
uA/µs
µs
Measured at 10 kHz
To 0.1% FSR. See Figure 7 and Figure 8 for
plots with a channels DC-DC enabled.
1 Guaranteed by characterization, not production tested.
Rev. PrD | Page 5 of 31

5 Page





AD5737 arduino
Preliminary Technical Data
AD5757/AD5737www.DataSheet4U.com
Pin No. Mnemonic
15 ALERT
16 FAULT
17 DGND
18 RESET
19 AVDD
20 N/C
21 CHARTA
22 IGATEA
23 COMPDCDC_A
24 VBOOST_A
25 N/C
26 IOUT_A
27 AVSS
28 N/C
29 CHARTB
30 N/C
31 IGATEB
32 COMPDCDC_B
33 IOUT_B
34 VBOOST_B
35 AGND
36 SW_B
37 GNDSW_B
38 GNDSW_A
39 SW_A
40 AVSS
41 SW_D
42 GNDSW_D
43 GNDSW_C
44 SW_C
45 AVCC
46 VBOOST_C
47 IOUT_C
48 COMPDCDC_C
49 IGATEC
50 N/C
51 CHARTC
52 N/C
Description
more information. When CLEAR is active, the DAC register cannot be written to.
Active High Output. This pin is asserted when there has been no SPI activity on the interface pins for a
predetermined time. See features section for more information.
Active Low Output. This pin is asserted low when an open circuit in current mode is detected or a short
circuit in voltage mode is detected or a PEC error is detected or an over temperature is detected (see
Features section). Open Drain Output.
Digital Ground Pin.
Hardware Reset. Active Low Input.
Positive Analog Supply Pin. Voltage ranges from 10.8 V to 33 V.
No Connection. Do not connect to this pin.
Hart Input Connection for DAC Channel A
Optional connection for external pass transistor. Not required when using DC-DC. Should be left unconnected.
DC-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the
feedback loop of channel A’s DC-DC converter.
Supply for channel A’s current output stage (See Figure 14). To use the DC-DC feature of the device,
connect as shown in Figure 20.
No Connection. Do not connect to this pin.
Current Output Pin for DAC Channel A.
Negative Analog Supply Pin. This Can be connected to AGND.
No Connection. Do not connect to this pin.
Hart Input Connection for DAC Channel B
No Connection. Do not connect to this pin.
Optional connection for external pass transistor. Not required when using DC-DC. Should be left unconnected.
DC-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the
feedback loop of channel B’s DC-DC converter.
Current Output Pin for DAC Channel B.
Supply for channel B’s current output stage (See Figure 14). To use the DC-DC feature of the device,
connect as shown in Figure 1.
Ground Reference Point for Analog Circuitry. This must be connected to 0 V.
Switching output for Channel B’s DC-DC circuitry. To use the DC-DC feature of the device, connect as
shown in Figure 1.
Ground connection for DC-DC switching circuit. This pin should always be connected to GND.
Ground connection for DC-DC switching circuit. This pin should always be connected to GND.
Switching output for Channel A’s DC-DC circuitry. To use the DC-DC feature of the device, connect as
shown in Figure 1.
Negative Analog Supply Pin.
Switching output for Channel D’s DC-DC circuitry. To use the DC-DC feature of the device, connect as
shown in Figure 1.
Ground connections for DC-DC switching circuit. This pin should always be connected to GND.
Ground connections for DC-DC switching circuit. This pin should always be connected to GND.
Switching output for Channel C’s DC-DC circuitry. To use the DC-DC feature of the device, connect as
shown in Figure 1.
Supply for DC-DC circuitry.
Supply for channel C’s current output stage (See Figure 14). To use the DC-DC feature of the device,
connect as shown in Figure 1.
Current Output Pin for DAC Channel C.
DC-DC Compensation Capacitor. Connect a 10 nF capacitor from this pin to ground. Used to regulate the
feedback loop of channel C’s DC-DC converter.
Optional connection for external pass transistor. Not required when using DC-DC. Should be left unconnected.
No Connection. Do not connect to this pin.
Hart Input Connection for DAC Channel B
No Connection. Do not connect to this pin.
Rev. PrD | Page 11 of 31

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