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AD5755 데이터시트 PDF




Analog Devices에서 제조한 전자 부품 AD5755은 전자 산업 및 응용 분야에서
광범위하게 사용되는 반도체 소자입니다.


 

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부품번호 AD5755 기능
기능 Quad Channel 16-Bit Serial Input - 4-20mA & Voltage Output DAC Dynamic Power Control
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AD5755 데이터시트, 핀배열, 회로
Preliminary Technical Data
FEATURES
16/12-Bit Resolution and Monotonicity
Dynamic Power Control for Thermal Management
Voltage or Current Output on the Same Pin
IOUT Range: 0mA-20mA, 4mA–20mA or 0mA–24mA
±0.05% Total Unadjusted Error (TUE) Max
VOUT Range: 0-5V, 0-10V, ±5V, ±10V,±6V,±12V
±0.04% Total Unadjusted Error (TUE) Max
User programmable Offset and Gain
On Chip Diagnostics
On-Chip Reference (±5 ppm/°C)
−40°C to +105°C Temperature Range
APPLICATIONS
Process Control
Actuator Control
PLC’s
PRODUCT HIGHLIGHTS
Dynamic Power Control for Thermal management
16bit performance
Multi-channel
Quad Cwhwwa.DnantaeShle,et41U6.co-mBit,
Serial Input, 4-20mA & Voltage Output DAC,
Dynamic Power Control
AD5755/AD5735
GENERAL DESCRIPTION
The AD5755/AD5735 is a quad, voltage and current output
DAC, which operates with a power supply range from -26v to
+33v. On chip dynamic power control minimizes package
power dissipation in current mode. This is achieved by
regulating the voltage on the output driver from between 7V-
30V.
The part uses a versatile 3-wire serial interface that operates at
clock rates up to 30 MHz and that is compatible with standard
SPI®, QSPI™, MICROWIRE™, DSP and microcontroller
interface standards. The interface also features optional CRC-8
packet error checking as well as a watchdog timer that monitors
activity on the interface.
Table 1. Complementary Devices
Part No.
Description
ADR445
5V, Ultralow Noise, LDO XFET Voltage
Reference with Current Sink and Source
ADP1871
Synchronous Buck Controller with Constant
On-Time, Valley Current Mode, and Power
Save Mode
Figure 1.
Rev. PrG
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.




AD5755 pdf, 반도체, 판매, 대치품
AD5755/AD5735
Parameter1
RL = ∞
RL = 2 kΩ
RL = ∞
DC Output Impedance
DC PSRR
CURRENT OUTPUT
Output Current Ranges
Resolution
ACCURACY (External RSet)
Total Unadjusted Error (TUE)
B Version
A Version
TUE TC2
Relative Accuracy (INL)
Differential Nonlinearity (DNL)
Offset Error
Offset Error Drift2
Gain Error
Gain TC2
Full-Scale Error
Full-Scale TC2
ACCURACY (Internal RSet)
Total Unadjusted Error (TUE)
B Version
A Version
TUE TC2
Relative Accuracy (INL)
Differential Nonlinearity (DNL)
Offset Error
Offset Error Drift2
Gain Error
Min
Typ Max
Unit
20 nF
TBD nF
2 µF
0.3
TBD
TBD
µV/V
µV/V
0 24 mA
0 20 mA
4 20 mA
16 Bits
12 Bits
Preliminary Technical Datawww.DataSheet4U.com
Test Conditions/Comments
External compensation capacitor of min TBD pF
connected.
AD5755
AD5735
−0.05
+0.05 % FSR
−0.02
−0.2
TBD +0.02
+0.2
% FSR
% FSR
TA = 25°C
−0.05
−TBD
TBD +0.05
±TB +TBD
D
% FSR
ppm
TA = 25°C
−0.006
+0.006 % FSR
AD5755
−0.025
+0.025 % FSR
AD5735
−1
+1 LSB
Guaranteed monotonic
−0.035
+0.035 % FSR
−TBD
TBD +TBD
±TB
D
% FSR
TA = 25°C
ppm FSR/°C
−0.02
+0.02 % FSR
−TBD
−TBD
TBD +TBD
+TBD
% FSR
TA = 25°C
ppm FSR/°C
−0.05
+0.05 % FSR
−TBD
−TBD
TBD +TBD
+TBD
% FSR
TA = 25°C
ppm FSR/°C
−0.12
+0.12 % FSR
−0.02
−0.3
TBD +0.02
+0.3
% FSR
% FSR
TA = 25°C
−0.75
−TBD
TBD +0.75
±TB +TBD
D
% FSR
ppm
TA = 25°C
−0.006
+0.006 % FSR
AD5755
−0.025
+0.025 % FSR
AD5735
−1
+1 LSB
Guaranteed monotonic
−0.04
+0.04 % FSR
−TBD
TBD +TBD
±TB
D
% FSR
TA = 25°C
ppm FSR/°C
−0.08
+0.08 % FSR
−TBD TBD +TBD % FSR
TA = 25°C
Rev. PrG | Page 4 of 34

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AD5755 전자부품, 판매, 대치품
Preliminary Technical Data
AC PSRR
AC PSRR
Current Output
Output Current Settling Time
Output Noise (0.1 Hz to 10 Hz
Bandwidth)
Output Noise (100 kHz Bandwidth)
Output Noise Spectral Density
Slew Rate
TBD
TBD
TBD TBD
-
0.1
80
TBD
TBD
TBD
1 Guaranteed by characterization, not production tested.
AD5755/AD5735www.DataSheet4U.com
dB 100mV 150KHz Sine wave superimposed on
power supply voltage
dB 200mV 50/60Hz Sine wave superimposed on
power supply voltage
µs typ
ms typ
LSB p-p
To 0.1% FSR
See Figure 7 and Figure 8
(16-Bit LSB)
µV rms
nV/√Hz
uA/µs
µs
Measured at 10 kHz
To 0.1% FSR. See Figure 7 and Figure 8 for
plots with a channels DC-DC enabled.
Rev. PrG | Page 7 of 34

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