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PDF 89V516RD Data sheet ( Hoja de datos )

Número de pieza 89V516RD
Descripción SST89V516RD
Fabricantes Silicon Storage Technology 
Logotipo Silicon Storage Technology Logotipo



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No Preview Available ! 89V516RD Hoja de datos, Descripción, Manual

FlashFlex MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
www.DataSheet4U.com
FEATURES:
Data Sheet
• 8-bit 8051-Compatible Microcontroller (MCU)
with Embedded SuperFlash Memory
– Fully Software Compatible
– Development Toolset Compatible
– Pin-For-Pin Package Compatible
• SST89E516RD2 Operation
– 0 to 40 MHz at 5V
• SST89V516RD2 Operation
– 0 to 33 MHz at 3V
• 1 KByte Internal RAM
• Dual Block SuperFlash EEPROM
– 64 KByte primary block +
8 KByte secondary block
(128-Byte sector size for both blocks)
– Individual Block Security Lock with SoftLock
– Concurrent Operation during
In-Application Programming (IAP)
– Memory Overlay for Interrupt Support during IAP
• Support External Address Range up to 64
KByte of Program and Data Memory
• Three High-Current Drive Ports (16 mA each)
• Three 16-bit Timers/Counters
• Full-Duplex, Enhanced UART
– Framing Error Detection
– Automatic Address Recognition
• Ten Interrupt Sources at 4 Priority Levels
– Four External Interrupt Inputs
• Programmable Watchdog Timer (WDT)
• Programmable Counter Array (PCA)
• Four 8-bit I/O Ports (32 I/O Pins) and
One 4-bit Port
• Second DPTR register
• Low EMI Mode (Inhibit ALE)
• SPI Serial Interface
• Standard 12 Clocks per cycle, the device has an
option to double the speed to 6 clocks per cycle.
• TTL- and CMOS-Compatible Logic Levels
• Brown-out Detection
• Low Power Modes
– Power-down Mode with External Interrupt Wake-up
– Idle Mode
• Temperature Ranges:
– Commercial (0°C to +70°C)
– Industrial (-40°C to +85°C)
• Packages Available
– 40-contact WQFN (Port 4 feature not available)
– 44-lead PLCC
– 40-pin PDIP (Port 4 feature not available)
– 44-lead TQFP
• All non-Pb (lead-free) devices are RoHS compliant
PRODUCT DESCRIPTION
The SST89E516RDx and SST89V516RDx are members
of the FlashFlex family of 8-bit microcontroller products
designed and manufactured with SST’s patented and pro-
prietary SuperFlash CMOS semiconductor process tech-
nology. The split-gate cell design and thick-oxide tunneling
injector offer significant cost and reliability benefits for SST’s
customers. The devices use the 8051 instruction set and
are pin-for-pin compatible with standard 8051 microcontrol-
ler devices.
The devices come with 72 KByte of on-chip flash
EEPROM program memory which is partitioned into 2
independent program memory blocks. The primary Block 0
occupies 64 KByte of internal program memory space and
the secondary Block 1 occupies 8 KByte of internal pro-
gram memory space.
The 8-KByte secondary block can be mapped to the lowest
location of the 64 KByte address space; it can also be hid-
den from the program counter and used as an independent
EEPROM-like data memory.
In addition to the 72 KByte of EEPROM program memory
on-chip and 1024 x8 bits of on-chip RAM, the devices can
address up to 64 KByte of external program memory
andup to 64 KByte of external RAM.
The flash memory blocks can be programmed via a stan-
dard 87C5x OTP EPROM programmer fitted with a special
adapter and the firmware for SST’s devices. During power-
on reset, the devices can be configured as either a slave to
an external host for source code storage or a master to an
external host for an in-application programming (IAP) oper-
ation. The devices are designed to be programmed in-sys-
tem and in-application on the printed circuit board for
maximum flexibility. The devices are pre-programmed with
an example of the bootstrap loader in the memory, demon-
strating the initial user program code loading or subsequent
user code updating via the IAP operation. The sample
bootstrap loader is available for the user’s reference and
convenience only; SST does not guarantee its functionality
or usefulness. Chip-Erase or Block-Erase operations will
erase the pre-programmed sample code.
©2007 Silicon Storage Technology, Inc.
S71273-03-000
1/07
1
The SST logo, SuperFlash, and FlashFlex are registered trademarks of Silicon Storage Technology, Inc.
These specifications are subject to change without notice.

1 page




89V516RD pdf
FlashFlex MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
www.DataSheet4U.com
Data Sheet
TABLE 3-10: PCA SFRs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20
TABLE 4-1: Product Identification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34
TABLE 4-2: IAP Address Resolution . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35
TABLE 4-3: IAP Commands. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38
TABLE 5-1: Timer/Counter 0 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 5-2: Timer/Counter 1 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 5-3: Timer/Counter 2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39
TABLE 8-1: PCA Timer/Counter Source . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46
TABLE 8-2: PCA Timer/Counter Inputs . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
TABLE 8-3: CMOD Values. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47
TABLE 8-4: PCA High and Low Register Compare/Capture Modules. . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
TABLE 8-5: PCA Module Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
TABLE 8-6: PCA Module Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49
TABLE 8-7: Pulse Width Modulator Frequencies. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 53
TABLE 9-1: Security Lock Options. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56
TABLE 9-2: Security Lock Access Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57
TABLE 11-1: Interrupt Polling Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 59
TABLE 12-1: Power Saving Modes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
TABLE 13-1: Recommended Values for C1 and C2 by Crystal Type . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
TABLE 13-2: Clock Doubling Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 62
TABLE 14-1: Operating Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
TABLE 14-2: Reliability Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 63
TABLE 14-3: AC Conditions of Test. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
TABLE 14-4: Recommended System Power-up Timings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64
TABLE 14-5: Pin Impedance (VDD=3.3V, TA=25°C, f=1 Mhz, other pins open). . . . . . . . . . . . . . . . . . . . 64
TABLE 14-6: DC Electrical Characteristics for SST89E516RDx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 65
TABLE 14-7: DC Electrical Characteristics for SST89V516RDx . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
TABLE 14-8: AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 70
TABLE 14-9: External Clock Drive . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 73
TABLE 14-10: Serial Port Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74
TABLE 14-11: Flash Memory Programming/Verification Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . 76
TABLE 16-1: Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 81
©2007 Silicon Storage Technology, Inc.
5
S71273-03-000
1/07

5 Page





89V516RD arduino
FlashFlex MCU
SST89E516RD2 / SST89E516RD
SST89V516RD2 / SST89V516RD
www.DataSheet4U.com
Data Sheet
TABLE 2-1: Pin Descriptions (Continued) (2 of 2)
Symbol
Type1
Name and Functions
P3[3]
I INT1#: External Interrupt 1 Input
P3[4]
I T0: External count input to Timer/Counter 0
P3[5]
I T1: External count input to Timer/Counter 1
P3[6]
O WR#: External Data Memory Write strobe
P3[7]
O RD#: External Data Memory Read strobe
PSEN#
I/O Program Store Enable: PSEN# is the Read strobe to External Program Store. When the
device is executing from Internal Program Memory, PSEN# is inactive (VOH). When the
device is executing code from External Program Memory, PSEN# is activated twice each
machine cycle, except when access to External Data Memory while one PSEN# activation
is skipped in each machine cycle. A forced high-to-low input transition on the PSEN# pin
while the RST input is continually held high for more than ten machine cycles will cause the
device to enter External Host mode for programming.
RST
I Reset: While the oscillator is running, a high logic state on this pin for two machine cycles
will reset the device. After a reset, if the PSEN# pin is driven by a high-to-low input transition
while the RST input pin is held high, the device will enter the External Host mode, otherwise
the device will enter the Normal operation mode.
EA# I External Access Enable: EA# must be driven to VIL in order to enable the device to fetch
code from the External Program Memory. EA# must be driven to VIH for internal program
execution. However, Security lock level 4 will disable EA#, and program execution is only
possible from internal program memory. The EA# pin can tolerate a high voltage2 of 12V.
ALE/PROG#
P4[3:0]5
I/O Address Latch Enable: ALE is the output signal for latching the low byte of the address
during an access to external memory. This pin is also the programming pulse input
(PROG#) for flash programming. Normally the ALE3 is emitted at a constant rate of 1/6 the
crystal frequency4 and can be used for external timing and clocking. One ALE pulse is
skipped during each access to external data memory. However, if AO is set to 1, ALE is dis-
abled.
I/O with internal
pull-ups
Port 4: Port 4 is an 4-bit bi-directional I/O port with internal pull-ups. The port 4 output buff-
ers can drive LS TTL inputs. Port 4 pins are pulled high by the internal pull-ups when ‘1’s are
written to them and can be used as inputs in this state. As inputs, port 4 pins that are exter-
nally pulled low will source current because of the internal pull-ups.
P4[0]
I/O Bit 0 of port 4
P4[1]
I/O Bit 1 of port 4
P4[2] / INT3# I/O Bit 2 of port 4 / INT3# External interrupt 3 input
P4[3] / INT2# I/O Bit 3 of port 4 / INT2# External interrupt 2 input
XTAL1
I Crystal 1: Input to the inverting oscillator amplifier and input to the internal clock generator
circuits.
XTAL2
O Crystal 2: Output from the inverting oscillator amplifier
VDD I Power Supply
VSS I Ground
T2-1.0 1273
1. I = Input; O = Output
2. It is not necessary to receive a 12V programming supply voltage during flash programming.
3. ALE loading issue: When ALE pin experiences higher loading (>30pf) during the reset, the MCU may accidentally enter into modes
other than normal working mode. The solution is to add a pull-up resistor of 3-50 KΩ to VDD, e.g. for ALE pin.
4. For 6 clock mode, ALE is emitted at 1/3 of crystal frequency.
5. Port 4 is not present on the PDIP and WQFN packages.
©2007 Silicon Storage Technology, Inc.
11
S71273-03-000
1/07

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