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PDF AT49BV802AT Data sheet ( Hoja de datos )
| Número de pieza | AT49BV802AT | |
| Descripción | 8-megabit (512K x 16/ 1M x 8) 3-volt Only Flash Memory | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• Single Voltage Read/Write Operation: 2.65V to 3.6V
• Access Time – 70 ns
• Sector Erase Architecture
– Fifteen 32K Word (64K Bytes) Sectors with Individual Write Lockout
– Eight 4K Word (8K Bytes) Sectors with Individual Write Lockout
• Fast Byte/Word Program Time – 12 µs
• Fast Sector Erase Time – 300 ms
• Suspend/Resume Feature for Erase and Program
– Supports Reading and Programming from Any Sector by Suspending Erase
of a Different Sector
– Supports Reading Any Byte/Word in the Non-suspending Sectors by Suspending
Programming of Any Other Byte/Word
• Low-power Operation
– 12 mA Active
– 13 µA Standby
• Data Polling, Toggle Bit, Ready/Busy for End of Program Detection
• RESET Input for Device Initialization
• Sector Lockdown Support
• TSOP and CBGA Package Options
• Top or Bottom Boot Block Configuration Available
• 128-bit Protection Register
• Minimum 100,000 Erase Cycles
• Common Flash Interface (CFI)
Description
The AT49BV802A(T) is a 2.7-volt 8-megabit Flash memory organized as 524,288
words of 16 bits each or 1,048,576 bytes of 8 bits each. The x16 data appears on I/O0
- I/O15; the x8 data appears on I/O0 - I/O7. The memory is divided into 23 sectors for
erase operations. The AT49BV802A(T) is offered in a 48-lead TSOP and a 48-ball
CBGA package. The device has CE and OE control signals to avoid any bus conten-
tion. This device can be read or reprogrammed using a single power supply, making it
ideally suited for in-system programming.
Pin Configurations
Pin Name
A0 - A18
CE
OE
WE
RESET
RDY/BUSY
I/O0 - I/O14
I/O15 (A-1)
BYTE
NC
Function
Addresses
Chip Enable
Output Enable
Write Enable
Reset
READY/BUSY Output
Data Inputs/Outputs
I/O15 (Data Input/Output, Word Mode)
A-1 (LSB Address Input, Byte Mode)
Selects Byte or Word Mode
No Connect
www.DataSheet4U.com
8-megabit
(512K x 16/
1M x 8)
3-volt Only
Flash Memory
AT49BV802A
AT49BV802AT
Rev. 3405C–FLASH–9/04
1
1 page  
3405C–FLASH–9/04
AT49BV802A(T)
www.DataSheet4U.com
DATA POLLING: The AT49BV802A(T) features Data Polling to indicate the end of a program
cycle. If the status configuration register is set to a “00”, during a program cycle an attempted
read of the last byte/word loaded will result in the complement of the loaded data on I/O7.
Once the program cycle has been completed, true data is valid on all outputs and the next
cycle may begin. During a chip or sector erase operation, an attempt to read the device will
give a “0” on I/O7. Once the program or erase cycle has completed, true data will be read from
the device. Data Polling may begin at any time during the program cycle. Please see “Status
Bit Table” on page 10 for more details.
If the status bit configuration register is set to a “01”, the I/O7 status bit will be low while the
device is actively programming or erasing data. I/O7 will go high when the device has com-
pleted a program or erase operation. Once I/O7 has gone high, status information on the other
pins can be checked.
The Data Polling status bit must be used in conjunction with the erase/program and VPP status
bit as shown in the algorithm in Figures 1 and 2 on page 8.
TOGGLE BIT: In addition to Data Polling the AT49BV802A(T) provides another method for
determining the end of a program or erase cycle. During a program or erase operation, suc-
cessive attempts to read data from the memory will result in I/O6 toggling between one and
zero. Once the program cycle has completed, I/O6 will stop toggling and valid data will be
read. Examining the toggle bit may begin at any time during a program cycle. Please see “Sta-
tus Bit Table” on page 10 for more details.
The toggle bit status bit should be used in conjunction with the erase/program status bit as
shown in the algorithm in Figures 3 and 4 on page 9.
ERASE/PROGRAM STATUS BIT: The device offers a status bit on I/O5, which indicates
whether the program or erase operation has exceeded a specified internal pulse count limit. If
the status bit is a “1”, the device is unable to verify that an erase or a byte/word program oper-
ation has been successfully performed. If a program (Sector Erase) command is issued to a
protected sector, the protected sector will not be programmed (erased). The device will go to a
status read mode and the I/O5 status bit will be set high, indicating the program (erase) opera-
tion did not complete as requested. Once the erase/program status bit has been set to a “1”,
the system must write the Product ID Exit command to return to the read mode. The
erase/program status bit is a “0” while the erase or program operation is still in progress.
Please see “Status Bit Table” on page 10 for more details.
SECTOR LOCKDOWN: Each sector has a programming lockdown feature. This feature pre-
vents programming of data in the designated sectors once the feature has been enabled.
These sectors can contain secure code that is used to bring up the system. Enabling the lock-
down feature will allow the boot code to stay in the device while data in the rest of the device is
updated. This feature does not have to be activated; any sector’s usage as a write-protected
region is optional to the user.
At power-up or reset, all sectors are unlocked. To activate the lockdown for a specific sector,
the six-bus cycle Sector Lockdown command must be issued. Once a sector has been locked
down, the contents of the sector is read-only and cannot be erased or programmed.
SECTOR LOCKDOWN DETECTION: A software method is available to determine if program-
ming of a sector is locked down. When the device is in the software product identification
mode (see “Software Product Identification Entry/Exit” sections on page 22), a read from
address location 00002H within a sector will show if programming the sector is locked down. If
the data on I/O0 is low, the sector can be programmed; if the data on I/O0 is high, the program
lockdown feature has been enabled and the sector cannot be programmed. The software
product identification exit code should be used to return to standard operation.
5
5 Page 
AT49BV802A(T)
www.DataSheet4U.com
Command Definition in Hex(1)
Command
Sequence
Bus
Cycles
1st Bus
Cycle
Addr Data
2nd Bus
Cycle
Addr
Data
3rd Bus
Cycle
Addr Data
4th Bus
Cycle
Addr
Data
5th Bus
Cycle
Addr
Data
6th Bus
Cycle
Addr
Data
Read
Chip Erase
1
Addr
DOUT
6
555 AA AAA(2) 55 555 80
555
AA
AAA
55
555
10
Sector Erase
6
555 AA
AAA
55 555 80
555
AA
AAA
55 SA(3)(4) 30
Byte/Word Program
Enter Single Pulse
Program Mode
4 555 AA AAA 55 555 A0 Addr DIN
6
555 AA
AAA
55 555 80
555
AA
AAA
55
555
A0
Single Pulse
Byte/Word Program
1
Addr
DIN
Sector Lockdown
6
555 AA AAA(2) 55 555 80
555
AA
AAA
55 SA(3)(4) 60
Erase/Program
Suspend
1
XXX
B0
Erase/Program
Resume
1
XXX
30
Product ID Entry
3 555 AA AAA 55 555 90
Product ID Exit(5)
3 555 AA AAA 55 555 F0(8)
Product ID Exit(5)
1
XXX
F0(8)
Program Protection
Register
4 555 AA AAA 55 555 C0 Addr DIN
Lock Protection
Register - Block B
4
555 AA
AAA
55 555 C0
080
X0
Status of Block B
Protection
4 555 AA AAA 55 555 90 80 DOUT(6)
Set Configuration
Register
4
555
AA
AAA
55
555 D0
XXX
00/01(7)
CFI Query
1 X55 98
Notes:
1. The DATA FORMAT shown for each bus cycle is as follows; I/O7 - I/O0 (Hex). In word operation I/O15 - I/O8
are don’t care. The ADDRESS FORMAT shown for each bus cycle is as follows: A11 - A0 (Hex). Address A18 through A11 are don’t care in
the word mode. Address A18 through A11 and A-1 are don’t care in the byte mode.
2. Since A11 is a Don’t Care, AAA can be replaced with 2AA.
3. SA = sector address. Any byte/word address within a sector can be used to designate the sector address (see pages 13 - 14 for details).
4. Once a sector is in the lockdown mode, data in the protected sector cannot be changed unless the chip is reset or power cycled.
5. Either one of the Product ID Exit commands can be used.
6. If data bit D1 is “0”, block B is locked. If data bit D1 is “1”, block B can be reprogrammed.
7. The default state (after power-up) of the configuration register is “00”.
8. Bytes of data other than F0 may be used to exit the Product ID mode. However, it is recommended that F0 be used.
Absolute Maximum Ratings*
Temperature under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
Voltage on VPP
with Respect to Ground ...................................-0.6V to +13.0V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent dam-
age to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
3405C–FLASH–9/04
11
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