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QLX411GRX 데이터시트 PDF




Intersil Corporation에서 제조한 전자 부품 QLX411GRX은 전자 산업 및 응용 분야에서
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부품번호 QLX411GRX 기능
기능 Quad Lane Extender
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QLX411GRX 데이터시트, 핀배열, 회로
Quad Lane Extender
QLx411GRx
The QLx411GRx is a settable quad receive-side equalizer
with extended functionality for advanced protocols
operating with line rates up to 11.3Gb/s such as
InfiniBand (SDR, DDR and QDR) and 40G Ethernet
(40GBase-CR4). The QLx411GRx compensates for the
frequency dependent attenuation of copper twin-axial
cables, extending the signal reach up to at least 10m on
28AWG cable.
The small form factor, highly-integrated quad design is
ideal for high-density data transmission applications
including active copper cable assemblies. The four
equalizing filters within the QLx411GRx can each be set
to provide optimal signal fidelity for a given media and
length. The compensation level for each filter is set by
two external control pins.
Operating on a single 1.2V power supply, the QLx411GRx
enables per channel throughputs of 10Gb/s to 11.3Gb/s
while supporting lower data rates including 8.5, 6.25, 5,
4.25, 3.125, and 2.5Gb/s. The QLx411GRx uses current
mode logic (CML) inputs/outputs and is packaged in a
4mmx7mm 46 lead QFN. Individual lane LOS support is
included for module applications.
Typical Application Circuit
Features
• Supports data rates up to 11.3Gb/s
• Low power (135mW per channel)
• Low latency (<500ps)
• Four equalizers in a 4mmx7mm QFN package for
straight route-through architecture and simplified
routing
• Each equalizer boost is independently pin selectable
• Supports 64b/66b encoded data – long run lengths
• Line silence preservation
• 1.2V supply voltage
• Individual lane LOS support
Applications
• QSFP active copper cable modules
• InfiniBand SDR, DDR and QDR
• 40G Ethernet (40GBase-CR4)
• XAUI and RXAUI
• High-speed active cable assemblies
• High-speed printed circuit board (PCB) traces
Benefits
• Thinner gauge cable
• Extends cable reach greater than 3x
• Improved BER
Tx1[P,N]
Tx2[P,N]
Tx3[P,N]
Tx4[P,N]
Rx1[P,N]
0.1μF
0.1μF
Rx2[P,N]
0.1μF
Rx3[P,N]
0.1μF
Rx4[P,N]
Fabric Switch
1.2V
10nF
4 12
100pF
LOS CP EP VDD
OUT1[P,N]
0.1μF
IN1[P,N]
OUT2[P,N]
0.1μF
IN2[P,N]
QLx411GRx
OUT3[P,N]
0.1μF
IN3[P,N]
OUT4[P,N]
0.1μF
IN4[P,N]
DT 1.2V
Connector Paddle Card
Active Copper Cable Assembly
8-Pair Differential 100
Twin-Axial Cable
10m 28AWG
1.2V
10nF
100pF
12 4
VDD EP CP LOS
0.1μF
IN1[P,N]
OUT1[P,N]
0.1μF
IN2[P,N]
OUT2[P,N]
QLx411GRx
0.1μF
IN3[P,N]
OUT3[P,N]
0.1μF
IN4[P,N]
1.2V
DT
OUT4[P,N]
Connector Paddle Card
Host Channel
Adapter
0.1μF
Rx1[P,N]
0.1μF
Rx2[P,N]
0.1μF
Rx3[P,N]
0.1μF
Rx4[P,N]
Tx1[P,N]
Tx2[P,N]
Tx3[P,N]
Tx4[P,N]
November 19, 2009
FN6989.1
www.DataSheet.in
1 CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
1-888-INTERSIL or 1-888-468-3774 | Intersil (and design) is a registered trademark of Intersil Americas Inc.
Copyright Intersil Americas Inc. 2009. All Rights Reserved
All other trademarks mentioned are the property of their respective owners.




QLX411GRX pdf, 반도체, 판매, 대치품
QLx411GRx
Absolute Maximum Ratings
Supply Voltage (VDD to GND) . . . . . . . . . . . . -0.3V to 1.3V
Voltage at All Input Pins . . . . . . . . . . . -0.3V to VDD + 0.3V
ESD Rating at All Pins . . . . . . . . . . . . . . . . . . . . 2kV (HBM)
Thermal Information
Operating Ambient Temperature Range . . . . . . 0°C to +70°C
Storage Ambient Temperature Range . . . . -55°C to +150°C
Maximum Junction Temperature . . . . . . . . . . . . . . . +125°C
Pb-Free Reflow Profile . . . . . . . . . . . . . . . . . .see link below
http://www.intersil.com/pbfree/Pb-FreeReflow.asp
CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such conditions may adversely impact
product reliability and result in failures not covered by warranty.
Operating Conditions
PARAMETER
Supply Voltage
Operating Ambient Temperature
Bit Rate
SYMBOL
CONDITION
VDD
TA
NRZ data applied to any channel
MIN
1.1
0
2.5
TYP
1.2
25
MAX
1.3
70
11.3
UNITS
V
°C
Gb/s
Control Pin Characteristics Typical values are at VDD = 1.2V, TA = +25°C, and VIN = 600mVP-P, unless otherwise
noted. VDD = 1.1V to 1.3V, TA = 0°C to +70°C.
PARAMETER
SYMBOL
CONDITION
MIN TYP MAX UNITS
Output LOW Logic Level
Output HIGH Logic Level
Input Current
VOL
VOH
LOS[k]
LOS[k]
Current draw on digital pin, i.e., CP[k][A,B]
0 0 250
1000
VDD
30 100
mV
mV
µA
Electrical Specifications Typical values are at VDD = 1.2V, TA = +25°C, and VIN = 600mVP-P, unless otherwise noted.
VDD = 1.1V to 1.3V, TA = 0°C to +70°C.
PARAMETER
SYMBOL
CONDITION
MIN TYP MAX UNITS NOTES
Supply Current
Cable Input
Amplitude Range
IDD 360 mA
VIN Measured differentially at data source before 600 1200 1600 mVP-P
encountering channel loss
1
DC Differential
Input Resistance
Measured on input channel IN[k]
80 100 120
Ω
DC Single-Ended
Input Resistance
Measured on input channel IN[k]P or IN[k]N 40 50 60
Ω
Input Return Loss
(Differential)
SDD11 100MHz to 7.5GHz
8 dB 2
Input Return Loss
(Common Mode)
SCC11 100MHz to 7.5GHz
8 dB 2
Input Return Loss
(Com. to Diff.
Conversion)
SDC11 100MHz to 7.5GHz
20 dB 2
Output
Amplitude Range
VOUT Measured differentially at OUT[k]P and
450 600 650 mVP-P
OUT[k]N with 50Ω load on both output pins
Differential
Output Impedance
Measured on OUT[k]
80 105 120
Ω
Output Return Loss
(Differential)
SDD22 100MHz to 7.5GHz
8 dB 2
Output Return Loss
(Common Mode)
SCC22 100MHz to 7.5GHz
8 dB 2
Output Return Loss
(Com. to Diff.
Conversion)
SDC22 100MHz to 7.5GHz
20 dB 2
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FN6989.1
November 19, 2009

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QLX411GRX 전자부품, 판매, 대치품
QLx411GRx
FIGURE 4. FUNCTIONAL DIAGRAM OF A SINGLE CHANNEL WITHIN THE QLx411GRx
Operation
The QLx411GRx is an advanced quad lane-extender for
high-speed interconnects. A functional diagram of one of
the four channels in the QLx411GRx is shown in Figure 4.
In addition to a robust equalization filter to compensate
for channel loss and restore signal fidelity, the
QLx411GRx contains unique integrated features to
preserve special signaling protocols typically broken by
other equalizers. The signal detect function is used to
mute the channel output when the equalized signal falls
below the level determined by the Detection Threshold
(DT) pin voltage. This function is intended to preserve
periods of line silence (“quiescent state” in InfiniBand
contexts). Furthermore, the output of the signal
detect/DT comparator is used as a loss of signal (LOS)
indicator to indicate the absence of a received signal.
As illustrated in Figure 4, the core of each high-speed
signal path in the QLx411GRx is a sophisticated equalizer
followed by a limiting amplifier. The equalizer
compensates for skin loss, dielectric loss, and impedance
discontinuities in the transmission channel. Each
equalizer is followed by a limiting amplification stage that
provides a clean output signal with full amplitude swing
and fast rise-fall times for reliable signal decoding in a
subsequent receiver.
Individually Adjustable Equalization Boost
Each channel in the QLx411GRx features an
independently settable equalizer for custom signal
restoration. The flexibility of this adjustable
compensation architecture enables signal fidelity to be
optimized on a channel-by-channel basis, providing
support for a wide variety of channel characteristics and
data rates ranging from 2.5Gb/s to 11.3Gb/s. Because
the boost level is externally set rather than internally
adapted, the QLx411GRx provides reliable
communication from the very first bit transmitted. There
is no time needed for adaptation and control loop
convergence. Furthermore, there are no pathological
data patterns that will cause the QLx411GRx to move to
an incorrect boost level.
FIGURE 5. GAIN PROFILE FOR VARIOUS BOOST
SETTINGS IN QLx411GRx
Control Pin Boost Setting
The connectivity of the CP pins is used to determine the
boost level of each channel. Table 1 defines the mapping
from the 2-bit CP word to the 5 possible boost levels.
TABLE 1. MAPPING BETWEEN BOOST LEVEL AND CP-
PIN CONNECTIVITY
CP[A]
CP[B]
BOOST LEVEL
25kΩ
25kΩ
0
25kΩ
Open
1
25kΩ
0Ω
2
Open
25kΩ
3
Open
Open
4
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부품번호상세설명 및 기능제조사
QLX411GRX

Quad Lane Extender

Intersil Corporation
Intersil Corporation

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