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D72042 데이터시트 PDF




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D72042 데이터시트, 핀배열, 회로
DATA SHEET
MOS INTEGRATED CIRCUIT
µPD72042
LSI DEVICES FOR Inter Equipment BusTM (IEBusTM)
PROTOCOL CONTROL
The µPD72042 is a microcomputer peripheral LSI device for IEBus protocol control.
The µPD72042 performs all the processing required for layers 1 and 2 of the IEBus. The devices incorporate large
transmission and reception buffers, allowing the microcomputer to perform IEBus operations without interruption.
They also contain an IEBus driver and receiver, allowing them to directly connected to the bus directly.
FEATURES
Control of layers 1 and 2 of the IEBus protocol
• Support of a multi-master scheme
• Broadcast function
• Two communication modes having different
transmission speeds can be selected.
Mode 0
Mode 1
Transmission speed
Approx. 3.9 Kbps
Approx. 17 Kbps
q Built-in IEBus driver and receiver
q Transmission and reception buffers
Transmission buffer : 33 bytes, FIFO
Reception buffer
: 40 bytes, FIFO (capable of
holding more than one frame
of reception data.)
ORDERING INFORMATION
Microcomputer interface
Three-/two-wire serial I/O,
Transfer starting with MSB
Program crashes can be detected by means of a
watchdog timer.
Low power consumption (standby mode):
50 µA (max)
Oscillator frequency (fX): 6 MHz
• frequency accuracy: ±1.5%
Operating voltage: 5 V ±10%
Part number
µPD72042GT
Package
16-pin plastic SOP (9.53 mm (375))
The information in this document is subject to change without notice. Before using this document, please
confirm that this is the latest version.
Not all devices/types available in every country. Please check with local NEC representative for availability
and additional information.
Document No. S14870EJ1V0DS00 (1st edition)
Date Published June 2000 N CP(N)
Printed in Japan
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©
2000




D72042 pdf, 반도체, 판매, 대치품
CONTENTS
µPD72042
1. PIN FUNCTIONS ............................................................................................................................ 6
1.1 PIN FUNCTIONS ................................................................................................................................... 6
2. IEBus OPERATION ....................................................................................................................... 8
2.1 OVERVIEW .............................................................................................................................................. 8
2.2 IEBus COMMUNICATION PROTOCOL .............................................................................................. 9
2.2.1 Bus Mastership Determination (Arbitration) ............................................................................... 10
2.2.2 Communication Mode ................................................................................................................. 10
2.2.3 Communication Address ............................................................................................................. 11
2.2.4 Broadcast ..................................................................................................................................... 11
2.3 TRANSMISSION PROTOCOL .............................................................................................................. 11
2.4 TRANSMISSION DATA (CONTENTS OF THE DATA FIELD) ........................................................ 17
2.5 BIT FORMAT .......................................................................................................................................... 21
3. MICROCOMPUTER INTERFACE ................................................................................................. 22
3.1 TRANSFER METHOD ........................................................................................................................... 22
3.2 DATA TRANSFER FORMAT ................................................................................................................ 23
3.2.1 Three-Wire Data Transfer (SEL = 1) .......................................................................................... 23
3.2.2 Two-Wire Data Transfer (SEL = 0) ............................................................................................. 25
3.3 CONNECTION TO A MICROCOMPUTER ......................................................................................... 27
3.4 STANDBY MODE SETTING AND CANCELLATION ....................................................................... 28
3.5 RESET MODE SETTING AND CANCELLATION ............................................................................ 28
4. REGISTERS .................................................................................................................................... 29
5. EXAMPLE TIMINGS FOR COMMUNICATION .......................................................................... 59
6. EXAMPLE MICROCOMPUTER PROCESSING FLOW ............................................................. 67
6.1 COMMUNICATION FLAGS ................................................................................................................... 68
6.2 MAIN ROUTINE ..................................................................................................................................... 69
6.3 INTERRUPT ROUTINE ......................................................................................................................... 70
6.4 PROCESSING ROUTINES .................................................................................................................... 72
6.4.1 µPD72042 Initial Setting Routine ............................................................................................... 72
6.4.2 Communication Flag Initialization Routine ................................................................................. 72
6.4.3 Command Processing Routine ................................................................................................... 73
6.4.4 Master Communication Processing Routine .............................................................................. 73
6.4.5 Slave Data Transmission Processing Routine ........................................................................... 77
6.4.6 Transmission Processing Routine .............................................................................................. 80
6.4.7 Reception Processing Routine ................................................................................................... 81
7. ELECTRICAL CHARACTERISTICS ............................................................................................. 82
8. PACKAGE DRAWING .................................................................................................................... 86
4
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Data Sheet S14870EJ1V0DS00

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D72042 전자부품, 판매, 대치품
µPD72042
Pin No. Pin
I/O
14 RESET Input
15
TEST
Input
16 VDD
Function
I/O format
Serial reset signal input pin. A low input causes
a reset. Whenever the power is turned on, a
low-level signal must be applied to this pin.
During normal operation, a high level is applied.
IC test pin. When used, this pin must be tied to
the VDD pin directly.
Main power supply input pin
CMOS input
CMOS input
When reset
[for both hardware
and software]
Input
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Data Sheet S14870EJ1V0DS00
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